Hi Borislav, On 8/6/2019 1:40 PM, Borislav Petkov wrote: > On Tue, Aug 06, 2019 at 01:22:22PM -0700, Reinette Chatre wrote: >> ... because some platforms differ in which SKUs support cache >> pseudo-locking. On these platforms only the SKUs with inclusive cache >> support cache pseudo-locking, thus the additional check. > > Ok, so it sounds to me like that check in get_prefetch_disable_bits() > should be extended (and maybe renamed) to check for cache inclusivity > too, in order to know which platforms support cache pseudo-locking.
Indeed. As you pointed out this would be same system-wide and the check thus need not be delayed until it is known which cache is being pseudo-locked. > I'd leave it to tglx to say how we should mirror cache inclusivity in > cpuinfo_x86: whether a synthetic X86_FEATURE bit or cache the respective > CPUID words which state whether L2/L3 is inclusive... Thank you very much. I appreciate your guidance here. Reinette
