Parenting clockdomain for the IP should be enabled during the reset
handling logic, otherwise the reset may not finish properly. Re-order
the clockdomain control logic to avoid this.

Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
 drivers/bus/ti-sysc.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
index e6deabd..ad9c6d3 100644
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -1091,11 +1091,11 @@ static int __maybe_unused sysc_runtime_suspend(struct 
device *dev)
        ddata->enabled = false;
 
 err_allow_idle:
-       sysc_clkdm_allow_idle(ddata);
-
        if (ddata->disable_on_idle)
                reset_control_assert(ddata->rsts);
 
+       sysc_clkdm_allow_idle(ddata);
+
        return error;
 }
 
@@ -1109,11 +1109,12 @@ static int __maybe_unused sysc_runtime_resume(struct 
device *dev)
        if (ddata->enabled)
                return 0;
 
-       if (ddata->disable_on_idle)
-               reset_control_deassert(ddata->rsts);
 
        sysc_clkdm_deny_idle(ddata);
 
+       if (ddata->disable_on_idle)
+               reset_control_deassert(ddata->rsts);
+
        if (sysc_opt_clks_needed(ddata)) {
                error = sysc_enable_opt_clocks(ddata);
                if (error)
-- 
1.9.1

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. 
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

Reply via email to