Quoting [email protected] (2019-08-13 18:53:12) > From: Peng Fan <[email protected]> > > To Frac pll, the gate shift is 13, however to Int PLL the gate shift > is 11. > > Cc: <[email protected]> > Fixes: 96d6392b54db ("clk: imx: Add support for i.MX8MN clock driver") > Signed-off-by: Peng Fan <[email protected]> > Reviewed-by: Jacky Bai <[email protected]> > ---
This is a fix for a change in -next. Why is stable Cced?
