On Tue, Aug 20, 2019 at 08:28:36PM +0000, Atish Patra wrote: > On Tue, 2019-08-20 at 02:22 -0700, h...@infradead.org wrote: > > On Tue, Aug 20, 2019 at 08:42:19AM +0000, Atish Patra wrote: > > > cmask NULL is pretty common case and we would be unnecessarily > > > executing bunch of instructions everytime while not saving much. > > > Kernel > > > still have to make an SBI call and OpenSBI is doing a local flush > > > anyways. > > > > > > Looking at the code again, I think we can just use cpumask_weight > > > and > > > do local tlb flush only if local cpu is the only cpu present. > > > > > > Otherwise, it will just fall through and call > > > sbi_remote_sfence_vma(). > > > > Maybe it is just time to split the different cases at a higher level. > > The idea to multiple everything onto a single function always seemed > > odd to me. > > > > FYI, here is what I do for the IPI based tlbflush for the native S- > > mode > > clint prototype, which seems much easier to understand: > > > > http://git.infradead.org/users/hch/riscv.git/commitdiff/ea4067ae61e20fcfcf46a6f6bd1cc25710ce3afe > > This does seem a lot cleaner to me. We can reuse some of the code for > this patch as well. Based on NATIVE_CLINT configuration, it will send > an IPI or SBI call.
IMHO, this approach should be avoided because CLINT is compatible to but not mandatory in the privileged spec. In other words, it is possible that a Linux-capable RISC-V platform does not contain a CLINT component but rely on some other mechanism to deal with SW/timer interrupts. > > I can rebase my patch on top of yours and I can send it together or you > can include in your series. > > Let me know your preference. > > -- > Regards, > Atish Best, Alan
