From: Yazen Ghannam <yazen.ghan...@amd.com> Hi Boris,
This set contains a few fixes for some changes merged in v5.2. There are also a couple of fixes for older issues. In addition, there are a couple of patches to add support for Asymmetric Dual-Rank DIMMs. I don't have the failing config readily available that you used, but I believe I found the issue. Please let me know how it goes. I've also added RFC patches to avoid the "ECC disabled" message for nodes without memory. I haven't fully tested these, but I wanted to get your thoughts. Here's an earlier discussion: https://lkml.kernel.org/r/20180321191335.7832-1-yazen.ghan...@amd.com Thanks, Yazen Link: https://lkml.kernel.org/r/20190709215643.171078-1-yazen.ghan...@amd.com v2->v3: * Drop Fixes: tags in patch 1. * Add detection of x8 DRAM devices in patches 2 and 3. * Fix Chip Select size printing in patch 4. * Added RFC patches to avoid "ECC disabled" message for nodes without memory. v1->v2: * Squash patches 1 and 2 together. Yazen Ghannam (10): EDAC/amd64: Support more than two controllers for chip selects handling EDAC/amd64: Recognize DRAM device type with EDAC_CTL_CAP EDAC/amd64: Initialize DIMM info for systems with more than two channels EDAC/amd64: Find Chip Select memory size using Address Mask EDAC/amd64: Decode syndrome before translating address EDAC/amd64: Cache secondary Chip Select registers EDAC/amd64: Support Asymmetric Dual-Rank DIMMs EDAC/amd64: Gather hardware information early EDAC/amd64: Use cached data when checking for ECC EDAC/amd64: Check for memory before fully initializing an instance drivers/edac/amd64_edac.c | 371 +++++++++++++++++++++++++------------- drivers/edac/amd64_edac.h | 9 +- 2 files changed, 251 insertions(+), 129 deletions(-) -- 2.17.1
