kbuild test robot <l...@intel.com> writes: > tree: https://kernel.googlesource.com/pub/scm/linux/kernel/git/tip/tip.git > x86/urgent > head: cfa16294b1c5b320c0a0e1cac37c784b92366c87 > commit: cfa16294b1c5b320c0a0e1cac37c784b92366c87 [3/3] x86/apic: Include the > LDR when clearing out APIC registers > config: i386-defconfig (attached as .config) > compiler: gcc-7 (Debian 7.4.0-10) 7.4.0 > reproduce: > git checkout cfa16294b1c5b320c0a0e1cac37c784b92366c87 > # save the attached .config to linux build tree > make ARCH=i386 > > If you fix the issue, kindly add following tag > Reported-by: kbuild test robot <l...@intel.com> > > All warnings (new ones prefixed by >>): > > arch/x86/kernel/apic/apic.c: In function 'clear_local_APIC': >>> arch/x86/kernel/apic/apic.c:1182:6: warning: the address of >>> 'x2apic_enabled' will always evaluate as 'true' [-Waddress] > if (!x2apic_enabled) { > ^ Thomas, I apologize for the typo here. This is the x2apic_enabled() function. Should I respin ?
> > vim +1182 arch/x86/kernel/apic/apic.c > > 1142 > 1143 /* > 1144 * Local APIC start and shutdown > 1145 */ > 1146 > 1147 /** > 1148 * clear_local_APIC - shutdown the local APIC > 1149 * > 1150 * This is called, when a CPU is disabled and before rebooting, > so the state of > 1151 * the local APIC has no dangling leftovers. Also used to > cleanout any BIOS > 1152 * leftovers during boot. > 1153 */ > 1154 void clear_local_APIC(void) > 1155 { > 1156 int maxlvt; > 1157 u32 v; > 1158 > 1159 /* APIC hasn't been mapped yet */ > 1160 if (!x2apic_mode && !apic_phys) > 1161 return; > 1162 > 1163 maxlvt = lapic_get_maxlvt(); > 1164 /* > 1165 * Masking an LVT entry can trigger a local APIC error > 1166 * if the vector is zero. Mask LVTERR first to prevent > this. > 1167 */ > 1168 if (maxlvt >= 3) { > 1169 v = ERROR_APIC_VECTOR; /* any non-zero vector > will do */ > 1170 apic_write(APIC_LVTERR, v | APIC_LVT_MASKED); > 1171 } > 1172 /* > 1173 * Careful: we have to set masks only first to deassert > 1174 * any level-triggered sources. > 1175 */ > 1176 v = apic_read(APIC_LVTT); > 1177 apic_write(APIC_LVTT, v | APIC_LVT_MASKED); > 1178 v = apic_read(APIC_LVT0); > 1179 apic_write(APIC_LVT0, v | APIC_LVT_MASKED); > 1180 v = apic_read(APIC_LVT1); > 1181 apic_write(APIC_LVT1, v | APIC_LVT_MASKED); >> 1182 if (!x2apic_enabled) { > 1183 v = apic_read(APIC_LDR) & ~APIC_LDR_MASK; > 1184 apic_write(APIC_LDR, v); > 1185 } > 1186 if (maxlvt >= 4) { > 1187 v = apic_read(APIC_LVTPC); > 1188 apic_write(APIC_LVTPC, v | APIC_LVT_MASKED); > 1189 } > 1190 > 1191 /* lets not touch this if we didn't frob it */ > 1192 #ifdef CONFIG_X86_THERMAL_VECTOR > 1193 if (maxlvt >= 5) { > 1194 v = apic_read(APIC_LVTTHMR); > 1195 apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED); > 1196 } > 1197 #endif > 1198 #ifdef CONFIG_X86_MCE_INTEL > 1199 if (maxlvt >= 6) { > 1200 v = apic_read(APIC_LVTCMCI); > 1201 if (!(v & APIC_LVT_MASKED)) > 1202 apic_write(APIC_LVTCMCI, v | > APIC_LVT_MASKED); > 1203 } > 1204 #endif > 1205 > 1206 /* > 1207 * Clean APIC state for other OSs: > 1208 */ > 1209 apic_write(APIC_LVTT, APIC_LVT_MASKED); > 1210 apic_write(APIC_LVT0, APIC_LVT_MASKED); > 1211 apic_write(APIC_LVT1, APIC_LVT_MASKED); > 1212 if (maxlvt >= 3) > 1213 apic_write(APIC_LVTERR, APIC_LVT_MASKED); > 1214 if (maxlvt >= 4) > 1215 apic_write(APIC_LVTPC, APIC_LVT_MASKED); > 1216 > 1217 /* Integrated APIC (!82489DX) ? */ > 1218 if (lapic_is_integrated()) { > 1219 if (maxlvt > 3) > 1220 /* Clear ESR due to Pentium errata 3AP > and 11AP */ > 1221 apic_write(APIC_ESR, 0); > 1222 apic_read(APIC_ESR); > 1223 } > 1224 } > 1225 > > --- > 0-DAY kernel test infrastructure Open Source Technology Center > https://lists.01.org/pipermail/kbuild-all Intel Corporation