> Add cpu clock node on AP
>
> Signed-off-by: Gregory CLEMENT <gregory.clem...@bootlin.com>
Applied on mvebu/dt64
Gregory
> ---
> arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi | 4 ++++
> arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 7 +++++++
> 2 files changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
> b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
> index 2baafe12ebd4..472211159979 100644
> --- a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
> @@ -20,24 +20,28 @@
> compatible = "arm,cortex-a72";
> reg = <0x000>;
> enable-method = "psci";
> + clocks = <&cpu_clk 0>;
> };
> cpu1: cpu@1 {
> device_type = "cpu";
> compatible = "arm,cortex-a72";
> reg = <0x001>;
> enable-method = "psci";
> + clocks = <&cpu_clk 0>;
> };
> cpu2: cpu@100 {
> device_type = "cpu";
> compatible = "arm,cortex-a72";
> reg = <0x100>;
> enable-method = "psci";
> + clocks = <&cpu_clk 1>;
> };
> cpu3: cpu@101 {
> device_type = "cpu";
> compatible = "arm,cortex-a72";
> reg = <0x101>;
> enable-method = "psci";
> + clocks = <&cpu_clk 1>;
> };
> };
> };
> diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
> b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
> index 91dad7e4ee59..fca6536494b3 100644
> --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
> @@ -280,6 +280,13 @@
> #address-cells = <1>;
> #size-cells = <1>;
>
> + cpu_clk: clock-cpu@278 {
> + compatible = "marvell,ap806-cpu-clock";
> + clocks = <&ap_clk 0>, <&ap_clk 1>;
> + #clock-cells = <1>;
> + reg = <0x278 0xa30>;
> + };
> +
> ap_thermal: thermal-sensor@80 {
> compatible =
> "marvell,armada-ap806-thermal";
> reg = <0x80 0x10>;
> --
> 2.20.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
