On Wed, 28 Aug 2019 at 11:45, Yong Mao <yong....@mediatek.com> wrote: > > From: yong mao <yong....@mediatek.com> > > SDIO IRQ is not defaultly triggered by low level, > but by falling edge. It needs to set related register > to enable SDIO IRQ low level trigger function. > Otherwise the SDIO IRQ may be lost in some specail condition. > > Signed-off-by: Yong Mao <yong....@mediatek.com> > Signed-off-by: Chaotian Jing <chaotian.j...@mediatek.com>
Applied for next, thanks! Kind regards Uffe > --- > drivers/mmc/host/mtk-sd.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c > index 33f4b63..585f0c7 100644 > --- a/drivers/mmc/host/mtk-sd.c > +++ b/drivers/mmc/host/mtk-sd.c > @@ -192,6 +192,7 @@ > #define SDC_STS_CMDBUSY (0x1 << 1) /* RW */ > #define SDC_STS_SWR_COMPL (0x1 << 31) /* RW */ > > +#define SDC_DAT1_IRQ_TRIGGER (0x1 << 19) /* RW */ > /* SDC_ADV_CFG0 mask */ > #define SDC_RX_ENHANCE_EN (0x1 << 20) /* RW */ > > @@ -1568,6 +1569,7 @@ static void msdc_init_hw(struct msdc_host *host) > > /* Config SDIO device detect interrupt function */ > sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); > + sdr_set_bits(host->base + SDC_ADV_CFG0, SDC_DAT1_IRQ_TRIGGER); > > /* Configure to default data timeout */ > sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, 3); > -- > 1.9.1 >
