[PATCH 3/4] perf jevents: Add some missing events for Hisi hip08 L3C PMU

[John Garry]

Add some more missing events.

Signed-off-by: John Garry <john.ga...@huawei.com>
---
 .../arm64/hisilicon/hip08/uncore-l3c.json     | 56 +++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json 
b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json
index ca48747642e1..f463d0acfaef 100644
--- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json
+++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json
@@ -34,4 +34,60 @@
            "PublicDescription": "l3c precharge commands",
            "Unit": "hisi_sccl,l3c",
    },
+   {
+           "EventCode": "0x20",
+           "EventName": "uncore_hisi_l3c.rd_spipe",
+           "BriefDescription": "Count of the number of read lines that come 
from this cluster of CPU core in spipe",
+           "PublicDescription": "Count of the number of read lines that come 
from this cluster of CPU core in spipe",
+           "Unit": "hisi_sccl,l3c",
+   },
+   {
+           "EventCode": "0x21",
+           "EventName": "uncore_hisi_l3c.wr_spipe",
+           "BriefDescription": "Count of the number of write lines that come 
from this cluster of CPU core in spipe",
+           "PublicDescription": "Count of the number of write lines that come 
from this cluster of CPU core in spipe",
+           "Unit": "hisi_sccl,l3c",
+   },
+   {
+           "EventCode": "0x22",
+           "EventName": "uncore_hisi_l3c.rd_hit_spipe",
+           "BriefDescription": "Count of the number of read lines that hits in 
spipe of this L3C",
+           "PublicDescription": "Count of the number of read lines that hits 
in spipe of this L3C",
+           "Unit": "hisi_sccl,l3c",
+   },
+   {
+           "EventCode": "0x23",
+           "EventName": "uncore_hisi_l3c.wr_hit_spipe",
+           "BriefDescription": "Count of the number of write lines that hits 
in spipe of this L3C",
+           "PublicDescription": "Count of the number of write lines that hits 
in spipe of this L3C",
+           "Unit": "hisi_sccl,l3c",
+   },
+   {
+           "EventCode": "0x29",
+           "EventName": "uncore_hisi_l3c.back_invalid",
+           "BriefDescription": "Count of the number of L3C back invalid 
operations",
+           "PublicDescription": "Count of the number of L3C back invalid 
operations",
+           "Unit": "hisi_sccl,l3c",
+   },
+   {
+           "EventCode": "0x40",
+           "EventName": "uncore_hisi_l3c.retry_cpu",
+           "BriefDescription": "Count of the number of retry that L3C 
suppresses the CPU operations",
+           "PublicDescription": "Count of the number of retry that L3C 
suppresses the CPU operations",
+           "Unit": "hisi_sccl,l3c",
+   },
+   {
+           "EventCode": "0x41",
+           "EventName": "uncore_hisi_l3c.retry_ring",
+           "BriefDescription": "Count of the number of retry that L3C 
suppresses the ring operations",
+           "PublicDescription": "Count of the number of retry that L3C 
suppresses the ring operations",
+           "Unit": "hisi_sccl,l3c",
+   },
+   {
+           "EventCode": "0x42",
+           "EventName": "uncore_hisi_l3c.prefetch_drop",
+           "BriefDescription": "Count of the number of prefetch drops from 
this L3C",
+           "PublicDescription": "Count of the number of prefetch drops from 
this L3C",
+           "Unit": "hisi_sccl,l3c",
+   },
 ]
-- 
2.17.1