On 04-09-19, 01:18, Jassi Brar wrote:
> On Wed, Sep 4, 2019 at 12:51 AM Vinod Koul <vk...@kernel.org> wrote:
> >
> > On 18-08-19, 00:17, jassisinghb...@gmail.com wrote:
> > > From: Jassi Brar <jaswinder.si...@linaro.org>
> > >
> > > Document the devicetree bindings for Socionext Milbeaut HDMAC
> > > controller. Controller has upto 8 floating channels, that need
> > > a predefined slave-id to work from a set of slaves.
> > >
> > > Signed-off-by: Jassi Brar <jaswinder.si...@linaro.org>
> > > ---
> > > .../bindings/dma/milbeaut-m10v-hdmac.txt | 32 +++++++++++++++++++
> > > 1 file changed, 32 insertions(+)
> > > create mode 100644
> > > Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
> > > b/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
> > > new file mode 100644
> > > index 000000000000..f0960724f1c7
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
> > > @@ -0,0 +1,32 @@
> > > +* Milbeaut AHB DMA Controller
> > > +
> > > +Milbeaut AHB DMA controller has transfer capability bellow.
> >
> > s/bellow/below:
> >
> > > + - device to memory transfer
> > > + - memory to device transfer
> > > +
> > > +Required property:
> > > +- compatible: Should be "socionext,milbeaut-m10v-hdmac"
> > > +- reg: Should contain DMA registers location and length.
> > > +- interrupts: Should contain all of the per-channel DMA interrupts.
> > > + Number of channels is configurable - 2, 4 or 8, so
> > > + the number of interrupts specfied should be {2,4,8}.
> >
> > s/specfied/specified
> >
> Hi Vinod,
> Do you want me to spin yet another revision for the two types in text?
Yes that would be easier for me
Thanks
--
~Vinod
