Michael, Aneesh, please take a take at this trivial patch.
On Fri, 2019-08-23 at 10:22 -0400, Qian Cai wrote:
> Booting a POWER9 PowerNV system generates a few messages below with
> "____ptrval____" due to the pointers printed without a specifier
> extension (i.e unadorned %p) are hashed to prevent leaking information
> about the kernel memory layout.
>
> radix-mmu: Initializing Radix MMU
> radix-mmu: Partition table (____ptrval____)
> radix-mmu: Mapped 0x0000000000000000-0x0000000040000000 with 1.00 GiB
> pages (exec)
> radix-mmu: Mapped 0x0000000040000000-0x0000002000000000 with 1.00 GiB
> pages
> radix-mmu: Mapped 0x0000200000000000-0x0000202000000000 with 1.00 GiB
> pages
> radix-mmu: Process table (____ptrval____) and radix root for kernel:
> (____ptrval____)
>
> Signed-off-by: Qian Cai <c...@lca.pw>
> ---
> arch/powerpc/mm/book3s64/radix_pgtable.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c
> b/arch/powerpc/mm/book3s64/radix_pgtable.c
> index b4ca9e95e678..b6692ee9411d 100644
> --- a/arch/powerpc/mm/book3s64/radix_pgtable.c
> +++ b/arch/powerpc/mm/book3s64/radix_pgtable.c
> @@ -386,7 +386,6 @@ static void __init radix_init_pgtable(void)
> * physical address here.
> */
> register_process_table(__pa(process_tb), 0, PRTB_SIZE_SHIFT - 12);
> - pr_info("Process table %p and radix root for kernel: %p\n", process_tb,
> init_mm.pgd);
> asm volatile("ptesync" : : : "memory");
> asm volatile(PPC_TLBIE_5(%0,%1,2,1,1) : :
> "r" (TLBIEL_INVAL_SET_LPID), "r" (0));
> @@ -420,7 +419,6 @@ static void __init radix_init_partition_table(void)
> mmu_partition_table_set_entry(0, dw0, 0);
>
> pr_info("Initializing Radix MMU\n");
> - pr_info("Partition table %p\n", partition_tb);
> }
>
> void __init radix_init_native(void)
