Quoting Dinh Nguyen (2019-09-17 18:34:58)
> From: Dinh Nguyen <dinh.ngu...@intel.com>
>
> Document the Agilex clock bindings, and add the clock header file. The
> clock header is an enumeration of all the different clocks on the Agilex
> platform.
>
> Signed-off-by: Dinh Nguyen <dingu...@kernel.org>
This needs a signed-off-by from your intel address as that's the author.
> ---
> .../devicetree/bindings/clock/intc_agilex.txt | 20 ++++++
> include/dt-bindings/clock/agilex-clock.h | 70 +++++++++++++++++++
> 2 files changed, 90 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/intc_agilex.txt
> create mode 100644 include/dt-bindings/clock/agilex-clock.h
>
> diff --git a/Documentation/devicetree/bindings/clock/intc_agilex.txt
> b/Documentation/devicetree/bindings/clock/intc_agilex.txt
> new file mode 100644
> index 000000000000..bfec71420511
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/intc_agilex.txt
> @@ -0,0 +1,20 @@
> +Device Tree Clock bindings for Intel's SoCFPGA Agilex platform
> +
> +This binding uses the common clock binding[1].
Can you write this binding in YAML? That way we can verify the simple
usage of it easily.
> +
> +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
> +
> +Required properties:
> +- compatible : shall be
> + "intel,agilex-clkmgr"
> +
> +- reg : shall be the control register offset from CLOCK_MANAGER's base for
> the clock.
I don't quite understand what this means. What is the CLOCK_MANAGER
base for the clock? Doesn't this describe an offset to a clock
controller which provides more than one clk?
> +
> +- #clock-cells : from common clock binding, shall be set to 1.
> +
> +Example:
> + clkmgr: clock-controller@ffd10000 {
> + compatible = "intel,agilex-clkmgr";
> + reg = <0xffd10000 0x1000>;
> + #clock-cells = <1>;
> + };
