This patch adds the node for iMX8MQ Display Controller Subsystem.
Signed-off-by: Laurentiu Palcu <laurentiu.pa...@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 52aae34..d4aa778 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -871,6 +871,31 @@
interrupt-controller;
#interrupt-cells = <1>;
};
+
+ dcss: dcss@0x32e00000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nxp,imx8mq-dcss";
+ reg = <0x32e00000 0x2D000>, <0x32e2f000 0x1000>;
+ interrupts = <6>, <8>, <9>;
+ interrupt-names = "ctx_ld", "ctxld_kick",
"vblank";
+ interrupt-parent = <&irqsteer>;
+ clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
+ <&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
+ <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>,
+ <&clk IMX8MQ_VIDEO2_PLL_OUT>,
+ <&clk IMX8MQ_CLK_DISP_DTRC>;
+ clock-names = "apb", "axi", "rtrm", "pix",
"dtrc";
+ assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>,
+ <&clk IMX8MQ_CLK_DISP_RTRM>,
+ <&clk
IMX8MQ_VIDEO2_PLL1_REF_SEL>;
+ assigned-clock-parents = <&clk
IMX8MQ_SYS1_PLL_800M>,
+ <&clk
IMX8MQ_SYS1_PLL_800M>,
+ <&clk IMX8MQ_CLK_27M>;
+ assigned-clock-rates = <800000000>,
+ <400000000>;
+ status = "disabled";
+ };
};
gpu: gpu@38000000 {
--
2.7.4
