From: Chunyan Zhang <chunyan.zh...@unisoc.com>

[ Upstream commit 5e75ea9c67433a065b0e8595ad3c91c7c0ca0d2d ]

The number of config registers for different pll clocks probably are not
same, so we have to use malloc, and should free the memory before return.

Fixes: 3e37b005580b ("clk: sprd: add adjustable pll support")
Signed-off-by: Chunyan Zhang <chunyan.zh...@unisoc.com>
Signed-off-by: Chunyan Zhang <zhang.l...@gmail.com>
Link: https://lkml.kernel.org/r/20190905103009.27166-1-zhang.l...@gmail.com
Signed-off-by: Stephen Boyd <sb...@kernel.org>
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
 drivers/clk/sprd/pll.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/sprd/pll.c b/drivers/clk/sprd/pll.c
index 36b4402bf09e3..640270f51aa56 100644
--- a/drivers/clk/sprd/pll.c
+++ b/drivers/clk/sprd/pll.c
@@ -136,6 +136,7 @@ static unsigned long _sprd_pll_recalc_rate(const struct 
sprd_pll *pll,
                                         k2 + refin * nint * CLK_PLL_1M;
        }
 
+       kfree(cfg);
        return rate;
 }
 
@@ -222,6 +223,7 @@ static int _sprd_pll_set_rate(const struct sprd_pll *pll,
        if (!ret)
                udelay(pll->udelay);
 
+       kfree(cfg);
        return ret;
 }
 
-- 
2.20.1

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