John Hubbard <jhubb...@nvidia.com> writes: >> Is that what you meant? > > Yes. >
I am still trying to understand this issue. I am also analyzing some cases where interrupt disable is not done before the lockless pagetable walk (patch 3 discussion). But given I forgot to add the mm mailing list before, I think it would be wiser to send a v3 and gather feedback while I keep trying to understand how it works, and if it needs additional memory barrier here. Thanks! Leonardo Bras
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