Fix incorrect read-modify-write sequence in lpuart_flush_buffer() that was reading from UARTPFIFO and writing to UARTCFIFO instead of operating solely on the latter.
Fixes: 9bc19af9dacb ("tty: serial: fsl_lpuart: Flush HW FIFOs in .flush_buffer") Signed-off-by: Andrey Smirnov <andrew.smir...@gmail.com> Cc: Stefan Agner <ste...@agner.ch> Cc: Andrew Lunn <and...@lunn.ch> Cc: Vivien Didelot <vivien.dide...@gmail.com> Cc: Chris Healy <cphe...@gmail.com> Cc: Cory Tusar <cory.tu...@zii.aero> Cc: Lucas Stach <l.st...@pengutronix.de> Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org> Cc: Jiri Slaby <jsl...@suse.com> Cc: linux-...@nxp.com Cc: linux-ser...@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- Greg: This bug causes occasional boot hang on 5.4-rc1 on Vybrid, so it might be good to push that for 5.4-rc2. Thanks, Andrey Sirnov drivers/tty/serial/fsl_lpuart.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 3e17bb8a0b16..537896c4d887 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -548,7 +548,7 @@ static void lpuart_flush_buffer(struct uart_port *port) val |= UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH; lpuart32_write(&sport->port, val, UARTFIFO); } else { - val = readb(sport->port.membase + UARTPFIFO); + val = readb(sport->port.membase + UARTCFIFO); val |= UARTCFIFO_TXFLUSH | UARTCFIFO_RXFLUSH; writeb(val, sport->port.membase + UARTCFIFO); } -- 2.21.0