Add GPIO controllers for RDA8810PL SoC. There are 4 GPIO controllers in this SoC with maximum of 32 gpios. Except GPIOC, all controllers are capable of generating edge/level interrupts from first 8 lines.
Signed-off-by: Manivannan Sadhasivam <[email protected]> --- arch/arm/boot/dts/rda8810pl.dtsi | 48 ++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm/boot/dts/rda8810pl.dtsi b/arch/arm/boot/dts/rda8810pl.dtsi index 19cde895bf65..f30d6ece49fb 100644 --- a/arch/arm/boot/dts/rda8810pl.dtsi +++ b/arch/arm/boot/dts/rda8810pl.dtsi @@ -33,6 +33,21 @@ ranges; }; + modem@10000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x10000000 0xfffffff>; + + gpioc@1a08000 { + compatible = "rda,8810pl-gpio"; + reg = <0x1a08000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + }; + }; + apb@20800000 { compatible = "simple-bus"; #address-cells = <1>; @@ -60,6 +75,39 @@ <17 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hwtimer", "ostimer"; }; + + gpioa@30000 { + compatible = "rda,8810pl-gpio"; + reg = <0x30000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpiob@31000 { + compatible = "rda,8810pl-gpio"; + reg = <0x31000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpiod@32000 { + compatible = "rda,8810pl-gpio"; + reg = <0x32000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; + }; }; apb@20a00000 { -- 2.17.1
