This is required as a preparation of merging nSIM and HASP defonfig and device tree.
As we have HIGHMEM disabled in both HAPS and nSIM defconfigs this doesn't lead to any functional change. Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com> --- arch/arc/boot/dts/haps_hs.dts | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/arc/boot/dts/haps_hs.dts b/arch/arc/boot/dts/haps_hs.dts index 11fad2f79056..60d578e2781f 100644 --- a/arch/arc/boot/dts/haps_hs.dts +++ b/arch/arc/boot/dts/haps_hs.dts @@ -9,13 +9,15 @@ / { model = "snps,zebu_hs"; compatible = "snps,zebu_hs"; - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; interrupt-parent = <&core_intc>; memory { device_type = "memory"; - reg = <0x80000000 0x20000000>; /* 512 */ + /* CONFIG_LINUX_RAM_BASE needs to match low mem start */ + reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MB low mem */ + 0x1 0x00000000 0x0 0x40000000>; /* 1 GB highmem */ }; chosen { @@ -31,8 +33,9 @@ #address-cells = <1>; #size-cells = <1>; - /* child and parent address space 1:1 mapped */ - ranges; + /* only perip space at end of low mem accessible + bus addr, parent bus addr, size */ + ranges = <0x80000000 0x0 0x80000000 0x80000000>; core_clk: core_clk { #clock-cells = <0>; -- 2.21.0