On 10/17/19 8:00 PM, Ley Foon Tan wrote:
> On Wed, 2019-10-16 at 02:40 -0700, Ooi, Joyce wrote:
>> This patch adds QSPI flash interface in device tree for Intel Agilex
>>
>> Signed-off-by: Ooi, Joyce <joyce....@intel.com>
>> ---
>> v2: update the qspi_rootfs partition size
>> ---
>> arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 35
>> ++++++++++++++++++++++
>> 1 file changed, 35 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
>> b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
>> index 7814a9e..8de8118 100644
>> --- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
>> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
>> @@ -73,3 +73,38 @@
>> &watchdog0 {
>> status = "okay";
>> };
>> +
>> +&qspi {
>> + flash@0 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "mt25qu02g";
>> + reg = <0>;
>> + spi-max-frequency = <50000000>;
> QSPI can support up to 100MHz.
I've updated the patch accordingly.
Dinh
