Adding QMP v3 USB3 PHY support for SC7180.
Adding only usb phy reset in the list to avoid
reset of DP block.

Signed-off-by: Sandeep Maheswaram <s...@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <m...@chromium.org>
Reviewed-by: Stephen Boyd <swb...@chromium.org>
---
 drivers/phy/qualcomm/phy-qcom-qmp.c | 38 +++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c 
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index c190406..d9d3e2f 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -1458,6 +1458,10 @@ static const char * const msm8996_usb3phy_reset_l[] = {
        "phy", "common",
 };
 
+static const char * const sc7180_usb3phy_reset_l[] = {
+       "phy",
+};
+
 static const char * const sdm845_pciephy_reset_l[] = {
        "phy",
 };
@@ -1671,6 +1675,37 @@ static const struct qmp_phy_cfg qmp_v3_usb3phy_cfg = {
        .is_dual_lane_phy       = true,
 };
 
+static const struct qmp_phy_cfg sc7180_usb3phy_cfg = {
+       .type                   = PHY_TYPE_USB3,
+       .nlanes                 = 1,
+
+       .serdes_tbl             = qmp_v3_usb3_serdes_tbl,
+       .serdes_tbl_num         = ARRAY_SIZE(qmp_v3_usb3_serdes_tbl),
+       .tx_tbl                 = qmp_v3_usb3_tx_tbl,
+       .tx_tbl_num             = ARRAY_SIZE(qmp_v3_usb3_tx_tbl),
+       .rx_tbl                 = qmp_v3_usb3_rx_tbl,
+       .rx_tbl_num             = ARRAY_SIZE(qmp_v3_usb3_rx_tbl),
+       .pcs_tbl                = qmp_v3_usb3_pcs_tbl,
+       .pcs_tbl_num            = ARRAY_SIZE(qmp_v3_usb3_pcs_tbl),
+       .clk_list               = qmp_v3_phy_clk_l,
+       .num_clks               = ARRAY_SIZE(qmp_v3_phy_clk_l),
+       .reset_list             = sc7180_usb3phy_reset_l,
+       .num_resets             = ARRAY_SIZE(sc7180_usb3phy_reset_l),
+       .vreg_list              = qmp_phy_vreg_l,
+       .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
+       .regs                   = qmp_v3_usb3phy_regs_layout,
+
+       .start_ctrl             = SERDES_START | PCS_START,
+       .pwrdn_ctrl             = SW_PWRDN,
+
+       .has_pwrdn_delay        = true,
+       .pwrdn_delay_min        = POWER_DOWN_DELAY_US_MIN,
+       .pwrdn_delay_max        = POWER_DOWN_DELAY_US_MAX,
+
+       .has_phy_dp_com_ctrl    = true,
+       .is_dual_lane_phy       = true,
+};
+
 static const struct qmp_phy_cfg qmp_v3_usb3_uniphy_cfg = {
        .type                   = PHY_TYPE_USB3,
        .nlanes                 = 1,
@@ -2516,6 +2551,9 @@ static const struct of_device_id 
qcom_qmp_phy_of_match_table[] = {
                .compatible = "qcom,ipq8074-qmp-pcie-phy",
                .data = &ipq8074_pciephy_cfg,
        }, {
+               .compatible = "qcom,sc7180-qmp-usb3-phy",
+               .data = &sc7180_usb3phy_cfg,
+       }, {
                .compatible = "qcom,sdm845-qhp-pcie-phy",
                .data = &sdm845_qhp_pciephy_cfg,
        }, {
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

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