From: Joerg Roedel <jroe...@suse.de> Load the IDT right after switching to virtual addresses in head_64.S so that the kernel can handle #VC exceptions.
Signed-off-by: Joerg Roedel <jroe...@suse.de> --- arch/x86/kernel/head64.c | 15 +++++++++++++++ arch/x86/kernel/head_64.S | 17 +++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index 206a4b6144c2..0ecdf28291fc 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -489,3 +489,18 @@ void __init x86_64_start_reservations(char *real_mode_data) start_kernel(); } + +void __head early_idt_setup_early_handler(unsigned long physaddr) +{ + gate_desc *idt = fixup_pointer(idt_table, physaddr); + int i; + + for (i = 0; i < NUM_EXCEPTION_VECTORS; i++) { + struct idt_data data; + gate_desc desc; + + init_idt_data(&data, i, early_idt_handler_array[i]); + idt_init_desc(&desc, &data); + native_write_idt_entry(idt, i, &desc); + } +} diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index 301a76f317f3..c63e6bd432da 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -104,6 +104,20 @@ SYM_CODE_START_NOALIGN(startup_64) leaq _text(%rip), %rdi pushq %rsi call __startup_64 + /* Save return value */ + pushq %rax + + /* + * Load IDT with early handlers - needed for SEV-ES + * Do this here because this must only happen on the boot CPU + * and the code below is shared with secondary CPU bringup. + */ + leaq _text(%rip), %rdi + call early_idt_setup_early_handler + + /* Restore __startup_64 return value*/ + popq %rax + /* Restore pointer to real_mode_data */ popq %rsi /* Form the CR3 value being sure to include the CR3 modifier */ @@ -200,6 +214,9 @@ SYM_CODE_START(secondary_startup_64) */ movq initial_stack(%rip), %rsp + /* Load IDT */ + lidt idt_descr(%rip) + /* Check if nx is implemented */ movl $0x80000001, %eax cpuid -- 2.17.1