On Thu, May 07, 2020 at 01:17:53PM +0200, Thomas Bogendoerfer wrote: > On Wed, May 06, 2020 at 08:42:23PM +0300, [email protected] > wrote: > > From: Serge Semin <[email protected]> > > > > According to the MIPS32 InterAptiv software manual error codes 24 - 26 > > of CM2 indicate L2 ECC/parity error with switching to a corresponding > > errors info fields. This patch provides these errors parsing code, > > which handles the read/write uncorrectable and correctable ECC/parity > > errors, and prints instruction causing the fault, RAM array type, cache > > way/dword and syndrome associated with the faulty data. > > > > Co-developed-by: Alexey Malahov <[email protected]> > > Signed-off-by: Alexey Malahov <[email protected]> > > Signed-off-by: Serge Semin <[email protected]> > > Cc: Thomas Bogendoerfer <[email protected]> > > Cc: Paul Burton <[email protected]> > > Cc: Ralf Baechle <[email protected]> > > Cc: Arnd Bergmann <[email protected]> > > Cc: Rob Herring <[email protected]> > > Cc: [email protected] > > Cc: [email protected] > > --- > > arch/mips/kernel/mips-cm.c | 62 ++++++++++++++++++++++++++++++++++++-- > > 1 file changed, 60 insertions(+), 2 deletions(-) > > applied to mips-next.
Great! Thanks. -Sergey > > Thomas. > > -- > Crap can work. Given enough thrust pigs will fly, but it's not necessarily a > good idea. [ RFC1925, 2.3 ]
