On Fri, May 08, 2020 at 04:54:21PM -0600, Raul E Rangel wrote:
> The AMD eMMC 5.0 controller does not support 64 bit DMA.
>
> See the discussion here: https://marc.info/?l=linux-mmc&m=158879884514552&w=2
Link: ...
FWIW,
Reviewed-by: Andy Shevchenko <andriy.shevche...@linux.intel.com>
>
> Fixes: 34597a3f60b1 ("mmc: sdhci-acpi: Add support for ACPI HID of AMD
> Controller with HS400")
> Signed-off-by: Raul E Rangel <rran...@chromium.org>
> ---
>
> drivers/mmc/host/sdhci-acpi.c | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c
> index faba53cf139b..d8b76cb8698a 100644
> --- a/drivers/mmc/host/sdhci-acpi.c
> +++ b/drivers/mmc/host/sdhci-acpi.c
> @@ -605,10 +605,12 @@ static int sdhci_acpi_emmc_amd_probe_slot(struct
> platform_device *pdev,
> }
>
> static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = {
> - .chip = &sdhci_acpi_chip_amd,
> - .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
> - .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE |
> - SDHCI_QUIRK_32BIT_ADMA_SIZE,
> + .chip = &sdhci_acpi_chip_amd,
> + .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
> + .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
> + SDHCI_QUIRK_32BIT_DMA_SIZE |
> + SDHCI_QUIRK_32BIT_ADMA_SIZE,
> + .quirks2 = SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
> .probe_slot = sdhci_acpi_emmc_amd_probe_slot,
> };
>
> --
> 2.26.2.645.ge9eca65c58-goog
>
--
With Best Regards,
Andy Shevchenko
