----- On May 5, 2020, at 9:16 AM, Thomas Gleixner t...@linutronix.de wrote:
> +#define arch_nmi_enter() \
[...] \
> + ___hcr = read_sysreg(hcr_el2); \
> + if (!(___hcr & HCR_TGE)) { \
> + write_sysreg(___hcr | HCR_TGE, hcr_el2); \
> + isb(); \
Why is there an isb() above ^ ....
> + } \
> + /* \
[...]
> -#define arch_nmi_exit()
> \
[...]
> + /* \
> + * Make sure ___ctx->cnt release is visible before we \
> + * restore the sysreg. Otherwise a new NMI occurring \
> + * right after write_sysreg() can be fooled and think \
> + * we secured things for it. \
> + */ \
> + barrier(); \
> + if (!___ctx->cnt && !(___hcr & HCR_TGE)) \
> + write_sysreg(___hcr, hcr_el2); \
And not here ?
Thanks,
Mathieu
--
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
