Hi "周琰杰,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on robh/for-next]
[also build test WARNING on tip/timers/core linus/master v5.7-rc5]
[cannot apply to linux/master next-20200512]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]

url:    
https://github.com/0day-ci/linux/commits/Zhou-Yanjie/Introduce-SMP-support-for-CI20-based-on-JZ4780/20200514-171836
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: i386-allyesconfig (attached as .config)
compiler: gcc-7 (Ubuntu 7.5.0-6ubuntu2) 7.5.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <l...@intel.com>

All warnings (new ones prefixed by >>, old ones prefixed by <<):

In file included from include/linux/bitops.h:5:0,
from drivers/clocksource/ingenic-timer.c:8:
drivers/clocksource/ingenic-timer.c: In function 'ingenic_tcu_init':
>> include/linux/bits.h:36:22: warning: left shift count >= width of type 
>> [-Wshift-count-overflow]
(((~UL(0)) - (UL(1) << (l)) + 1) &                          ^
>> include/linux/bits.h:39:31: note: in expansion of macro '__GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^~~~~~~~~
>> drivers/clocksource/ingenic-timer.c:313:27: note: in expansion of macro 
>> 'GENMASK'
tcu->pwm_channels_mask = GENMASK(soc_info->num_channels - 1,
^~~~~~~

vim +/GENMASK +313 drivers/clocksource/ingenic-timer.c

   288  
   289  static int __init ingenic_tcu_init(struct device_node *np)
   290  {
   291          const struct of_device_id *id = 
of_match_node(ingenic_tcu_of_match, np);
   292          const struct ingenic_soc_info *soc_info = id->data;
   293          struct ingenic_tcu *tcu;
   294          struct regmap *map;
   295          unsigned cpu = 0;
   296          long rate;
   297          int ret;
   298  
   299          of_node_clear_flag(np, OF_POPULATED);
   300  
   301          map = device_node_to_regmap(np);
   302          if (IS_ERR(map))
   303                  return PTR_ERR(map);
   304  
   305          tcu = kzalloc(sizeof(*tcu), GFP_KERNEL);
   306          if (!tcu)
   307                  return -ENOMEM;
   308  
   309          /*
   310           * Enable all TCU channels for PWM use by default except 
channels 0/1,
   311           * and channel 2 if target CPU is JZ4780 and SMP is selected.
   312           */
 > 313          tcu->pwm_channels_mask = GENMASK(soc_info->num_channels - 1,
   314                                                                  NR_CPUS 
+ 1);
   315          of_property_read_u32(np, "ingenic,pwm-channels-mask",
   316                               (u32 *)&tcu->pwm_channels_mask);
   317  
   318          /* Verify that we have at least NR_CPUS + 1 free channels */
   319          if (hweight8(tcu->pwm_channels_mask) >
   320                          soc_info->num_channels - NR_CPUS + 1) {
   321                  pr_crit("%s: Invalid PWM channel mask: 0x%02lx\n", 
__func__,
   322                          tcu->pwm_channels_mask);
   323                  ret = -EINVAL;
   324                  goto err_free_ingenic_tcu;
   325          }
   326  
   327          tcu->map = map;
   328          tcu->np = np;
   329          ingenic_tcu = tcu;
   330  
   331          tcu->timer_local[cpu] = 
find_first_zero_bit(&tcu->pwm_channels_mask,
   332                                                   
soc_info->num_channels);
   333  
   334          for (cpu = 1; cpu < NR_CPUS; cpu++)
   335                  tcu->timer_local[cpu] = find_next_zero_bit(
   336                                  &tcu->pwm_channels_mask, 
soc_info->num_channels,
   337                                  tcu->timer_local[cpu - 1] + 1);
   338  
   339          tcu->cs_channel = find_next_zero_bit(&tcu->pwm_channels_mask,
   340                          soc_info->num_channels, tcu->timer_local[cpu - 
1] + 1);
   341  
   342          ret = ingenic_tcu_clocksource_init(np, tcu);
   343          if (ret) {
   344                  pr_crit("%s: Unable to init clocksource: %d\n", 
__func__, ret);
   345                  goto err_free_ingenic_tcu;
   346          }
   347  
   348          /* Setup clock events on each CPU core */
   349          ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "Ingenic XBurst: 
online",
   350                                  ingenic_tcu_setup_cevt, NULL);
   351          WARN_ON(ret < 0);
   352  
   353          /* Register the sched_clock at the end as there's no way to 
undo it */
   354          rate = clk_get_rate(tcu->cs_clk);
   355          sched_clock_register(ingenic_tcu_timer_read, 16, rate);
   356  
   357          return 0;
   358  
   359  err_free_ingenic_tcu:
   360          kfree(tcu);
   361          return ret;
   362  }
   363  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org

Attachment: .config.gz
Description: application/gzip

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