Linus Walleij writes:
> On Wed, May 13, 2020 at 4:11 PM Lars Povlsen <[email protected]> > wrote: > >> This adds DT bindings for the Microsemi SGPIO controller, bindings >> mscc,ocelot-sgpio and mscc,luton-sgpio. >> >> Reviewed-by: Alexandre Belloni <[email protected]> >> Signed-off-by: Lars Povlsen <[email protected]> > >> + microchip,sgpio-ports: >> + description: This is a 32-bit bitmask, configuring whether a >> + particular port in the controller is enabled or not. This allows >> + unused ports to be removed from the bitstream and reduce latency. >> + $ref: "/schemas/types.yaml#/definitions/uint32" > > I don't know about this. > > You are saying this pin controller can have up to 32 GPIO "ports" > (also known as banks). > > Why can't you just represent each such port as a separate GPIO > node: > > pinctrl@nnn { > gpio@0 { > .... > }; > gpio@1 { > .... > }; > .... > gpio@31 { > .... > }; > }; > > Then if some of them are unused just set it to status = "disabled"; > > This also makes your Linux driver simpler because each GPIO port > just becomes a set of 32bit registers and you can use > select GPIO_GENERIC and bgpio_init() and save a whole > slew of standard stock code. > Linus, thank you for your input. The controller handles an array of 32*n signals, where n >= 1 && n <= 4. The problem with the above approach is that the ports are disabled *port*-wise - so they remove all (upto) 4 bits. That would be across the banks. You could of course have the "implied" semantics that a disabled port at any bit position disabled all (bit positions for the same port). But I don't know if this would be easier to understand, DT-wise. What do you think...? > Yours, > Linus Walleij -- Lars Povlsen, Microchip
