On Thu, May 14, 2020 at 07:02:37PM +0200, Sebastian Reichel wrote: > From: Robert Beckett <[email protected]> > > Avoid LDB and IPU DI clocks both using the same parent. LDB requires > pasthrough clock to avoid breaking timing while IPU DI does not. > > Force IPU DI clocks to use IMX6QDL_CLK_PLL2_PFD0_352M as parent > and LDB to use IMX6QDL_CLK_PLL5_VIDEO_DIV. > > This fixes an issue where attempting atomic modeset while using > HDMI and display port at the same time causes LDB clock programming > to destroy the programming of HDMI that was done during the same > modeset. > > Cc: [email protected] > Signed-off-by: Robert Beckett <[email protected]> > [Use IMX6QDL_CLK_PLL2_PFD0_352M instead of IMX6QDL_CLK_PLL2_PFD2_396M > originally chosen by Robert Beckett to avoid affecting eMMC clock > by DRM atomic updates] > Signed-off-by: Ian Ray <[email protected]> > [Squash Robert's and Ian's commits for bisectability, update patch > description and add stable tag] > Signed-off-by: Sebastian Reichel <[email protected]>
Applied, thanks.
