Re: [PATCH V4 15/17] arm64/cpufeature: Add remaining feature bits in ID_AA64DFR0 register

[Suzuki K Poulose]

On 05/19/2020 10:40 AM, Anshuman Khandual wrote:
Enable MTPMU and TRACEFILT features bits in ID_AA64DFR0 register as per ARM
DDI 0487F.a specification.
Cc: Catalin Marinas <catalin.mari...@arm.com>
Cc: Will Deacon <w...@kernel.org>
Cc: Mark Rutland <mark.rutl...@arm.com>
Cc: Suzuki K Poulose <suzuki.poul...@arm.com>
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org

Suggested-by: Will Deacon <w...@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khand...@arm.com>
---
  arch/arm64/include/asm/sysreg.h | 2 ++
  arch/arm64/kernel/cpufeature.c  | 2 ++
  2 files changed, 4 insertions(+)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index a572069ccf6e..4bcd21cc2d68 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -766,6 +766,8 @@
  #define ID_AA64MMFR2_CNP_SHIFT                0
  
  /* id_aa64dfr0 */
+#define ID_AA64DFR0_MTPMU_SHIFT                48
+#define ID_AA64DFR0_TRACEFILT_SHIFT    40
  #define ID_AA64DFR0_PMSVER_SHIFT      32
  #define ID_AA64DFR0_CTX_CMPS_SHIFT    28
  #define ID_AA64DFR0_WRPS_SHIFT                20
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 6338151f263c..986974be0178 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -366,6 +366,8 @@ static const struct arm64_ftr_bits ftr_id_mmfr0[] = {
  };
  
  static const struct arm64_ftr_bits ftr_id_aa64dfr0[] = {
+       S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 
ID_AA64DFR0_MTPMU_SHIFT, 4, 0),
+       ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 
ID_AA64DFR0_TRACEFILT_SHIFT, 4, 0),

We maske both the fields for KVM in AArch32 ID registers. We should do 
the same here.

Suzuki