On Fri, May 22, 2020 at 03:07:50AM +0300, Serge Semin wrote:
> Since DMA transfers are performed asynchronously with actual SPI
> transaction, then even if DMA transfers are finished it doesn't mean
> all data is actually pushed to the SPI bus. Some data might still be
> in the controller FIFO. This is specifically true for Tx-only
> transfers. In this case if the next SPI transfer is recharged while
> a tail of the previous one is still in FIFO, we'll loose that tail
> data. In order to fix this lets add the wait procedure of the Tx/Rx
> SPI transfers completion after the corresponding DMA transactions
> are finished.
...
> Fixes: 7063c0d942a1 ("spi/dw_spi: add DMA support")
Usually we put this before any other tags.
> Cc: Ramil Zaripov <ramil.zari...@baikalelectronics.ru>
> Cc: Alexey Malahov <alexey.mala...@baikalelectronics.ru>
> Cc: Thomas Bogendoerfer <tsbog...@alpha.franken.de>
> Cc: Paul Burton <paulbur...@kernel.org>
> Cc: Ralf Baechle <r...@linux-mips.org>
> Cc: Arnd Bergmann <a...@arndb.de>
> Cc: Andy Shevchenko <andriy.shevche...@linux.intel.com>
> Cc: Rob Herring <robh...@kernel.org>
Are you sure Rob needs this to see?
You really need to shrink Cc lists of the patches to send them on common sense
basis.
> Cc: linux-m...@vger.kernel.org
> Cc: devicet...@vger.kernel.org
Ditto.
...
> Changelog v4:
> - Get back ndelay() method to wait for an SPI transfer completion.
> spi_delay_exec() isn't suitable for the atomic context.
OTOH we may teach spi_delay_exec() to perform atomic sleeps.
...
> + while (dw_spi_dma_tx_busy(dws) && retry--)
> + ndelay(ns);
I might be mistaken, but I think I told that this one misses to keep power
management in mind.
Have you read Documentation/process/volatile-considered-harmful.rst ?
...
> + while (dw_spi_dma_rx_busy(dws) && retry--)
> + ndelay(ns);
Ditto.
--
With Best Regards,
Andy Shevchenko
