On Mon, May 25, 2020 at 06:08:20PM +0300, Kirill A. Shutemov wrote:
> On Mon, May 25, 2020 at 05:59:43PM +0300, Mike Rapoport wrote:
> > On Mon, May 25, 2020 at 07:49:02AM +0300, Kirill A. Shutemov wrote:
> > > On Mon, May 11, 2020 at 10:17:21PM +0300, Kirill A. Shutemov wrote:
> > > > A 5-level paging capable machine can have memory above 46-bit in the
> > > > physical address space. This memory is only addressable in the 5-level
> > > > paging mode: we don't have enough virtual address space to create direct
> > > > mapping for such memory in the 4-level paging mode.
> > > >
> > > > Currently, we fail boot completely: NULL pointer dereference in
> > > > subsection_map_init().
> > > >
> > > > Skip creating a memblock for such memory instead and notify user that
> > > > some memory is not addressable.
> > > >
> > > > Signed-off-by: Kirill A. Shutemov <kirill.shute...@linux.intel.com>
> > > > Reviewed-by: Dave Hansen <dave.han...@intel.com>
> > > > Cc: sta...@vger.kernel.org # v4.14
> > > > ---
> > >
> > > Gentle ping.
> > >
> > > It's not urgent, but it's a bug fix. Please consider applying.
> > >
> > > > Tested with a hacked QEMU:
> > > > https://gist.github.com/kiryl/d45eb54110944ff95e544972d8bdac1d
> > > >
> > > > ---
> > > > arch/x86/kernel/e820.c | 19 +++++++++++++++++--
> > > > 1 file changed, 17 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
> > > > index c5399e80c59c..d320d37d0f95 100644
> > > > --- a/arch/x86/kernel/e820.c
> > > > +++ b/arch/x86/kernel/e820.c
> > > > @@ -1280,8 +1280,8 @@ void __init e820__memory_setup(void)
> > > >
> > > > void __init e820__memblock_setup(void)
> > > > {
> > > > + u64 size, end, not_addressable = 0;
> > > > int i;
> > > > - u64 end;
> > > >
> > > > /*
> > > > * The bootstrap memblock region count maximum is 128 entries
> > > > @@ -1307,7 +1307,22 @@ void __init e820__memblock_setup(void)
> > > > if (entry->type != E820_TYPE_RAM && entry->type !=
> > > > E820_TYPE_RESERVED_KERN)
> > > > continue;
> > > >
> > > > - memblock_add(entry->addr, entry->size);
> > > > + if (entry->addr >= MAXMEM) {
> > > > + not_addressable += entry->size;
> > > > + continue;
> > > > + }
> > > > +
> > > > + end = min_t(u64, end, MAXMEM - 1);
> > > > + size = end - entry->addr;
> > > > + not_addressable += entry->size - size;
> > > > + memblock_add(entry->addr, size);
> > > > + }
> > > > +
> > > > + if (not_addressable) {
> > > > + pr_err("%lldGB of physical memory is not addressable in
> > > > the paging mode\n",
> > > > + not_addressable >> 30);
> > > > + if (!pgtable_l5_enabled())
> > > > + pr_err("Consider enabling 5-level paging\n");
> >
> > Could this happen at all when l5 is enabled?
> > Does it mean we need kmap() for 64-bit?
>
> It's future-profing. Who knows what paging modes we would have in the
> future.
Than maybe
pr_err("%lldGB of physical memory is not addressable in %s the paging
mode\n",
not_addressable >> 30, pgtable_l5_enabled() "5-level" ?
"4-level");
"the paging mode" on its own sounds a bit awkward to me.
> --
> Kirill A. Shutemov
--
Sincerely yours,
Mike.
