On Mon, May 11, 2020 at 01:44:52PM -0700, Tuan Phan wrote: > DMC-620 PMU supports 10 total counters that are independently > programmable for different events and can be individually started and > stopped. > > ACPI is only supported; device tree support is welcomed to be added and > tested for other platforms. > > Usage example: > #perf stat -e arm_dmc620_10008c000/clk_cycle_count/ -C 0 > Get perf event for clk_cycle_count counter. > > #perf stat -e arm_dmc620_10008c000/clkdiv2_allocate,mask=0x1f,match=0x2f, > incr=2,invert=1/ -C 0 > The above example shows how to specify mask, match, incr, > invert parameters for clkdiv2_allocate event. > > Signed-off-by: Tuan Phan <tuanp...@os.amperecomputing.com> > --- > Changes in v2: > - Removed IRQF_SHARED flag and added support for multiple > PMUs sharing the same interrupt. > - Fixed an interrupt handler race condition. > > The ACPI binding spec for PMU DMC620 is under beta and located > in ARM server group under project "ACPI on ARM". > > drivers/perf/Kconfig | 8 + > drivers/perf/Makefile | 1 + > drivers/perf/arm_dmc620_pmu.c | 869 > ++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 878 insertions(+) > create mode 100644 drivers/perf/arm_dmc620_pmu.c
Given that this is Arm IP, it would be nice to have a review from somebody at Arm. I have vague recollections of an internal DMC PMU driver too, but I don't remember the details. Will
