On Thu, May 21, 2020 at 6:34 AM Anup Patel <anup.pa...@wdc.com> wrote:
>
> The plic_find_hart_id() can be useful to other interrupt controller
> drivers (such as RISC-V local interrupt driver) so we rename this
> function to riscv_of_parent_hartid() and place it in arch directory
> along with riscv_of_processor_hartid().
>
> Signed-off-by: Anup Patel <anup.pa...@wdc.com>
> ---
> arch/riscv/include/asm/processor.h | 1 +
> arch/riscv/kernel/cpu.c | 16 ++++++++++++++++
> drivers/irqchip/irq-sifive-plic.c | 16 +---------------
> 3 files changed, 18 insertions(+), 15 deletions(-)
>
> diff --git a/arch/riscv/include/asm/processor.h
> b/arch/riscv/include/asm/processor.h
> index 3ddb798264f1..b1efd840003c 100644
> --- a/arch/riscv/include/asm/processor.h
> +++ b/arch/riscv/include/asm/processor.h
> @@ -75,6 +75,7 @@ static inline void wait_for_interrupt(void)
>
> struct device_node;
> int riscv_of_processor_hartid(struct device_node *node);
> +int riscv_of_parent_hartid(struct device_node *node);
>
> extern void riscv_fill_hwcap(void);
>
> diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
> index 40a3c442ac5f..6d59e6906fdd 100644
> --- a/arch/riscv/kernel/cpu.c
> +++ b/arch/riscv/kernel/cpu.c
> @@ -44,6 +44,22 @@ int riscv_of_processor_hartid(struct device_node *node)
> return hart;
> }
>
> +/*
> + * Find hart ID of the CPU DT node under which given DT node falls.
> + *
> + * To achieve this, we walk up the DT tree until we find an active
> + * RISC-V core (HART) node and extract the cpuid from it.
> + */
> +int riscv_of_parent_hartid(struct device_node *node)
> +{
> + for (; node; node = node->parent) {
> + if (of_device_is_compatible(node, "riscv"))
> + return riscv_of_processor_hartid(node);
> + }
> +
> + return -1;
> +}
> +
> #ifdef CONFIG_PROC_FS
>
> static void print_isa(struct seq_file *f, const char *isa)
> diff --git a/drivers/irqchip/irq-sifive-plic.c
> b/drivers/irqchip/irq-sifive-plic.c
> index d9c53f85a68e..16d31d114c30 100644
> --- a/drivers/irqchip/irq-sifive-plic.c
> +++ b/drivers/irqchip/irq-sifive-plic.c
> @@ -240,20 +240,6 @@ static void plic_handle_irq(struct pt_regs *regs)
> csr_set(CSR_IE, IE_EIE);
> }
>
> -/*
> - * Walk up the DT tree until we find an active RISC-V core (HART) node and
> - * extract the cpuid from it.
> - */
> -static int plic_find_hart_id(struct device_node *node)
> -{
> - for (; node; node = node->parent) {
> - if (of_device_is_compatible(node, "riscv"))
> - return riscv_of_processor_hartid(node);
> - }
> -
> - return -1;
> -}
> -
> static void plic_set_threshold(struct plic_handler *handler, u32 threshold)
> {
> /* priority must be > threshold to trigger an interrupt */
> @@ -330,7 +316,7 @@ static int __init plic_init(struct device_node *node,
> if (parent.args[0] != RV_IRQ_EXT)
> continue;
>
> - hartid = plic_find_hart_id(parent.np);
> + hartid = riscv_of_parent_hartid(parent.np);
> if (hartid < 0) {
> pr_warn("failed to parse hart ID for context %d.\n",
> i);
> continue;
> --
> 2.25.1
>
>
Reviewed-by: Atish Patra <atish.pa...@wdc.com>
--
Regards,
Atish
