Hello!
On 29.05.2020 6:58, Serge Semin wrote:
Seeing DW APB SSI controller doesn't support setting the exactly
requested SPI bus frequency, but only a rounded frequency determined
by means of the odd-numbered half-worded reference clock divider,
it would be good tune the SPI core up and initialize the current
^ to?
transfer effective_speed_hz. By doing so the core will be able to
execute the xfer-related delays with better accuracy.
Signed-off-by: Serge Semin <sergey.se...@baikalelectronics.ru>
Cc: Georgy Vlasov <georgy.vla...@baikalelectronics.ru>
Cc: Ramil Zaripov <ramil.zari...@baikalelectronics.ru>
Cc: Alexey Malahov <alexey.mala...@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbog...@alpha.franken.de>
Cc: Arnd Bergmann <a...@arndb.de>
Cc: Feng Tang <feng.t...@intel.com>
Cc: Andy Shevchenko <andriy.shevche...@linux.intel.com>
Cc: Rob Herring <robh...@kernel.org>
Cc: linux-m...@vger.kernel.org
Cc: devicet...@vger.kernel.org
[...]
MBR, Sergei
