This commit enables the usage of a second
UART interface.

Signed-off-by: Konrad Dybcio <[email protected]>
---
 arch/arm64/boot/dts/qcom/msm8992.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi 
b/arch/arm64/boot/dts/qcom/msm8992.dtsi
index 8f7cdf2b9a1f..ff745905525c 100644
--- a/arch/arm64/boot/dts/qcom/msm8992.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
@@ -279,6 +279,16 @@ blsp1_uart2: serial@f991e000 {
                                <&clock_gcc GCC_BLSP1_AHB_CLK>;
                };
 
+               blsp2_uart2: serial@f995e000 {
+                       compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+                       reg = <0xf995e000 0x1000>;
+                       interrupt = <GIC_SPI 146 IRQ_TYPE_LEVEL_LOW>;
+                       status = "disabled";
+                       clock-names = "core", "iface";
+                       clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>,
+                               <&gcc GCC_BLSP2_AHB_CLK>;
+               };
+
                clock_gcc: clock-controller@fc400000 {
                        compatible = "qcom,gcc-msm8994";
                        #clock-cells = <1>;
-- 
2.26.2

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