On 2020-06-01 10:15, Anup Patel wrote:
The RISC-V per-HART local interrupt controller manages software
interrupts, timer interrupts, external interrupts (which are routed
via the platform level interrupt controller) and other per-HART
local interrupts.
We add a driver for the RISC-V local interrupt controller, which
eventually replaces the RISC-V architecture code, allowing for a
better split between arch code and drivers.
The driver is compliant with RISC-V Hart-Level Interrupt Controller
DT bindings located at:
Documentation/devicetree/bindings/interrupt-controller/riscv,cpu-intc.txt
Co-developed-by: Palmer Dabbelt <pal...@dabbelt.com>
Signed-off-by: Palmer Dabbelt <pal...@dabbelt.com>
Signed-off-by: Anup Patel <anup.pa...@wdc.com>
Acked-by: Palmer Dabbelt <palmerdabb...@google.com>
---
arch/riscv/Kconfig | 1 +
arch/riscv/include/asm/irq.h | 2 -
arch/riscv/kernel/irq.c | 33 +------
arch/riscv/kernel/traps.c | 2 -
drivers/irqchip/Kconfig | 13 +++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-riscv-intc.c | 146 ++++++++++++++++++++++++++++++
drivers/irqchip/irq-sifive-plic.c | 30 ++++--
include/linux/cpuhotplug.h | 1 +
9 files changed, 188 insertions(+), 41 deletions(-)
create mode 100644 drivers/irqchip/irq-riscv-intc.c
Reviewed-by: Marc Zyngier <m...@kernel.org>
M.
--
Jazz is not dead. It just smells funny...
