On Fri, Jun 5, 2020 at 2:10 AM Palmer Dabbelt <pal...@dabbelt.com> wrote:
>
> On Thu, 21 May 2020 06:45:40 PDT (-0700), Anup Patel wrote:
> > We add mechanism to set custom IPI operations so that CLINT driver
> > from drivers directory can provide custom IPI operations.
> >
> > Signed-off-by: Anup Patel <anup.pa...@wdc.com>
> > ---
> > arch/riscv/include/asm/smp.h | 11 ++++++++
> > arch/riscv/kernel/smp.c | 52 ++++++++++++++++++++++++------------
> > arch/riscv/kernel/smpboot.c | 3 +--
> > 3 files changed, 47 insertions(+), 19 deletions(-)
> >
> > diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
> > index 40bb1c15a731..ad0601260cb1 100644
> > --- a/arch/riscv/include/asm/smp.h
> > +++ b/arch/riscv/include/asm/smp.h
> > @@ -40,6 +40,17 @@ void arch_send_call_function_single_ipi(int cpu);
> > int riscv_hartid_to_cpuid(int hartid);
> > void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask
> > *out);
> >
> > +struct riscv_ipi_ops {
> > + void (*ipi_inject)(const unsigned long *hart_mask);
> > + void (*ipi_clear)(void);
> > +};
> > +
> > +/* Set custom IPI operations */
> > +void riscv_set_ipi_ops(struct riscv_ipi_ops *ops);
> > +
> > +/* Clear IPI for current CPU */
> > +void riscv_clear_ipi(void);
> > +
> > /*
> > * Obtains the hart ID of the currently executing task. This relies on
> > * THREAD_INFO_IN_TASK, but we define that unconditionally.
> > diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c
> > index b1d4f452f843..8375cc5970f6 100644
> > --- a/arch/riscv/kernel/smp.c
> > +++ b/arch/riscv/kernel/smp.c
> > @@ -84,6 +84,35 @@ static void ipi_stop(void)
> > wait_for_interrupt();
> > }
> >
> > +#if IS_ENABLED(CONFIG_RISCV_SBI)
> > +static void clear_ipi(void)
> > +{
> > + csr_clear(CSR_IP, IE_SIE);
> > +}
> > +
> > +static struct riscv_ipi_ops sbi_ipi_ops = {
> > + .ipi_inject = sbi_send_ipi,
> > + .ipi_clear = clear_ipi,
> > +};
> > +
> > +static struct riscv_ipi_ops *ipi_ops = &sbi_ipi_ops;
> > +#else
> > +static struct riscv_ipi_ops *ipi_ops;
> > +#endif
> > +
> > +void riscv_set_ipi_ops(struct riscv_ipi_ops *ops)
> > +{
> > + ipi_ops = ops;
> > +}
> > +EXPORT_SYMBOL_GPL(riscv_set_ipi_ops);
> > +
> > +void riscv_clear_ipi(void)
> > +{
> > + if (ipi_ops)
> > + ipi_ops->ipi_clear();
> > +}
> > +EXPORT_SYMBOL_GPL(riscv_clear_ipi);
>
> There should at least be a warning on SMP systems when an ipi_ops hasn't been
> set, as otherwise the system will just hang.
Sure, I will add pr_warn() here.
>
> > +
> > static void send_ipi_mask(const struct cpumask *mask, enum
> > ipi_message_type op)
> > {
> > struct cpumask hartid_mask;
> > @@ -95,10 +124,9 @@ static void send_ipi_mask(const struct cpumask *mask,
> > enum ipi_message_type op)
> > smp_mb__after_atomic();
> >
> > riscv_cpuid_to_hartid_mask(mask, &hartid_mask);
> > - if (IS_ENABLED(CONFIG_RISCV_SBI))
> > - sbi_send_ipi(cpumask_bits(&hartid_mask));
> > - else
> > - clint_send_ipi_mask(mask);
> > +
> > + if (ipi_ops)
> > + ipi_ops->ipi_inject(cpumask_bits(&hartid_mask));
> > }
> >
> > static void send_ipi_single(int cpu, enum ipi_message_type op)
> > @@ -109,18 +137,8 @@ static void send_ipi_single(int cpu, enum
> > ipi_message_type op)
> > set_bit(op, &ipi_data[cpu].bits);
> > smp_mb__after_atomic();
> >
> > - if (IS_ENABLED(CONFIG_RISCV_SBI))
> > - sbi_send_ipi(cpumask_bits(cpumask_of(hartid)));
> > - else
> > - clint_send_ipi_single(hartid);
> > -}
> > -
> > -static inline void clear_ipi(void)
> > -{
> > - if (IS_ENABLED(CONFIG_RISCV_SBI))
> > - csr_clear(CSR_IP, IE_SIE);
> > - else
> > - clint_clear_ipi(cpuid_to_hartid_map(smp_processor_id()));
> > + if (ipi_ops)
> > + ipi_ops->ipi_inject(cpumask_bits(cpumask_of(hartid)));
> > }
> >
> > void handle_IPI(struct pt_regs *regs)
> > @@ -131,7 +149,7 @@ void handle_IPI(struct pt_regs *regs)
> >
> > irq_enter();
> >
> > - clear_ipi();
> > + riscv_clear_ipi();
> >
> > while (true) {
> > unsigned long ops;
> > diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
> > index 4e9922790f6e..5fe849791bf0 100644
> > --- a/arch/riscv/kernel/smpboot.c
> > +++ b/arch/riscv/kernel/smpboot.c
> > @@ -147,8 +147,7 @@ asmlinkage __visible void smp_callin(void)
> > {
> > struct mm_struct *mm = &init_mm;
> >
> > - if (!IS_ENABLED(CONFIG_RISCV_SBI))
> > - clint_clear_ipi(cpuid_to_hartid_map(smp_processor_id()));
> > + riscv_clear_ipi();
> >
> > /* All kernel threads share the same mm context. */
> > mmgrab(mm);
Regards,
Anup
