On Wed, Jun 10, 2020 at 03:21:31PM +0200, Borislav Petkov wrote: > On Wed, Jun 10, 2020 at 02:32:26PM +0200, Peter Zijlstra wrote: > > We cache a whole bunch of MSRs in kernel. Why is this one special? > > If the others need the post-write handling, they should be added there > too. I did it with this one only as a start.
Still, this is really weird. The msr device is per cpu (because MSRs are per cpu), but this shadow value is global (because we keep the same value on all CPUs), so you then have to broadcast IPI around to fix up the other CPUs, which, with a bit of bad luck will also get written by userspace, causing O(n^2) IPIs. Also, this gives some MSRs radically different behaviour from other MSRs. Why not create a sane sysfs interface for this LS_CFG muck in cpu/bugs.c or so? A simple sysfs file should not me much more lines than all this.
