The clock > CLOCK_TOO_SLOW_HZ condition gating phy configuration
is only required because dll should not be enabled at too low a
clock frequency or too low timing. Make sure that this condition
only gates dll enablement.
Signed-off-by: Faiz Abbas <faiz_ab...@ti.com>
---
drivers/mmc/host/sdhci_am654.c | 42 ++++++++++++++++------------------
1 file changed, 20 insertions(+), 22 deletions(-)
diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c
index 365eb2819dd9..8b0f69012d09 100644
--- a/drivers/mmc/host/sdhci_am654.c
+++ b/drivers/mmc/host/sdhci_am654.c
@@ -204,34 +204,32 @@ static void sdhci_am654_set_clock(struct sdhci_host
*host, unsigned int clock)
sdhci_set_clock(host, clock);
- if (clock > CLOCK_TOO_SLOW_HZ) {
- /* Setup DLL Output TAP delay */
- if (sdhci_am654->legacy_otapdly)
- otap_del_sel = sdhci_am654->otap_del_sel[0];
- else
- otap_del_sel = sdhci_am654->otap_del_sel[timing];
+ /* Setup DLL Output TAP delay */
+ if (sdhci_am654->legacy_otapdly)
+ otap_del_sel = sdhci_am654->otap_del_sel[0];
+ else
+ otap_del_sel = sdhci_am654->otap_del_sel[timing];
- otap_del_ena = (timing > MMC_TIMING_UHS_SDR25) ? 1 : 0;
+ otap_del_ena = (timing > MMC_TIMING_UHS_SDR25) ? 1 : 0;
- mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
- val = (otap_del_ena << OTAPDLYENA_SHIFT) |
- (otap_del_sel << OTAPDLYSEL_SHIFT);
+ mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
+ val = (otap_del_ena << OTAPDLYENA_SHIFT) |
+ (otap_del_sel << OTAPDLYSEL_SHIFT);
- /* Write to STRBSEL for HS400 speed mode */
- if (timing == MMC_TIMING_MMC_HS400) {
- if (sdhci_am654->flags & STRBSEL_4_BIT)
- mask |= STRBSEL_4BIT_MASK;
- else
- mask |= STRBSEL_8BIT_MASK;
+ /* Write to STRBSEL for HS400 speed mode */
+ if (timing == MMC_TIMING_MMC_HS400) {
+ if (sdhci_am654->flags & STRBSEL_4_BIT)
+ mask |= STRBSEL_4BIT_MASK;
+ else
+ mask |= STRBSEL_8BIT_MASK;
- val |= sdhci_am654->strb_sel << STRBSEL_SHIFT;
- }
+ val |= sdhci_am654->strb_sel << STRBSEL_SHIFT;
+ }
- regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val);
+ regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val);
- if (timing > MMC_TIMING_UHS_SDR25)
- sdhci_am654_setup_dll(host, clock);
- }
+ if (timing > MMC_TIMING_UHS_SDR25 && clock > CLOCK_TOO_SLOW_HZ)
+ sdhci_am654_setup_dll(host, clock);
}
static void sdhci_j721e_4bit_set_clock(struct sdhci_host *host,
--
2.17.1
