From: Grant Likely <[EMAIL PROTECTED]>

Change the wait_tx routine to call cpu_relax() instead of udelay() to
reduce console output latency and test for the TXFULL bit instead of
TXEMPTY.  That way the FIFO doesn't need to by 100% flushed before
writing the next character.

Signed-off-by: Grant Likely <[EMAIL PROTECTED]>
---

 drivers/serial/uartlite.c |   10 ++++++----
 1 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c
index dfef83f..a85f2d3 100644
--- a/drivers/serial/uartlite.c
+++ b/drivers/serial/uartlite.c
@@ -329,12 +329,14 @@ static struct uart_ops ulite_ops = {
 static void ulite_console_wait_tx(struct uart_port *port)
 {
        int i;
+       u8 val;
 
-       /* wait up to 10ms for the character(s) to be sent */
-       for (i = 0; i < 10000; i++) {
-               if (readb(port->membase + ULITE_STATUS) & ULITE_STATUS_TXEMPTY)
+       /* Spin waiting for TX fifo to have space available */
+       for (i = 0; i < 100000; i++) {
+               val = readb(port->membase + ULITE_STATUS);
+               if ((val & ULITE_STATUS_TXFULL) == 0)
                        break;
-               udelay(1);
+               cpu_relax();
        }
 }
 

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