[PATCH] ARM: dts: ste: Align L2 cache-controller nodename with dtschema

[Krzysztof Kozlowski]

Fix dtschema validator warnings like:
    l2-cache: $nodename:0: 'l2-cache' does not match 
'^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <k...@kernel.org>
---
 arch/arm/boot/dts/ste-dbx5x0.dtsi          | 2 +-
 arch/arm/boot/dts/ste-nomadik-stn8815.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi 
b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index 3e10da3f8fd3..05fd544b06c1 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -260,7 +260,7 @@
                        reg = <0x80150000 0x2000>;
                };
 
-               L2: l2-cache {
+               L2: cache-controller {
                        compatible = "arm,pl310-cache";
                        reg = <0xa0412000 0x1000>;
                        interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi 
b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
index f78b4eabd68c..4f38aeecadb3 100644
--- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
+++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
@@ -15,7 +15,7 @@
                    <0x08000000 0x04000000>;
        };
 
-       L2: l2-cache {
+       L2: cache-controller {
                compatible = "arm,l210-cache";
                reg = <0x10210000 0x1000>;
                interrupt-parent = <&vica>;
-- 
2.17.1