On Fri, Jul 03, 2020 at 05:49:19AM -0700, [email protected] wrote:
> +static void intel_pmu_store_lbr(struct cpu_hw_events *cpuc,
> + struct lbr_entry *entries)
> +{
> + struct perf_branch_entry *e;
> + struct lbr_entry *lbr;
> + u64 from, to, info;
> + int i;
> +
> + for (i = 0; i < x86_pmu.lbr_nr; i++) {
> + lbr = entries ? &entries[i] : NULL;
> + e = &cpuc->lbr_entries[i];
> +
> + from = rdlbr_from(i, lbr);
> + /*
> + * Read LBR entries until invalid entry (0s) is detected.
> + */
> + if (!from)
> + break;
> +
> + to = rdlbr_to(i, lbr);
> + info = rdlbr_info(i, lbr);
> +
> + e->from = from;
> + e->to = to;
> + e->mispred = !!(info & LBR_INFO_MISPRED);
> + e->predicted = !(info & LBR_INFO_MISPRED);
> + e->in_tx = !!(info & LBR_INFO_IN_TX);
> + e->abort = !!(info & LBR_INFO_ABORT);
> + e->cycles = info & LBR_INFO_CYCLES;
> + e->type = 0;
> + e->reserved = 0;
> + }
> +
> + cpuc->lbr_stack.nr = i;
> +}
If I'm not mistaken, this correctly deals with LBR_FORMAT_INFO, so can't
we also use the intel_pmu_arch_lbr_read() function for that case?
Then we can delete that section from read_64...
Index: linux-2.6/arch/x86/events/intel/core.c
===================================================================
--- linux-2.6.orig/arch/x86/events/intel/core.c
+++ linux-2.6/arch/x86/events/intel/core.c
@@ -4664,6 +4664,9 @@ __init int intel_pmu_init(void)
x86_pmu.lbr_read = intel_pmu_lbr_read_32;
}
+ if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO)
+ x86_pmu.lbr_read = intel_pmu_arch_lbr_read;
+
if (boot_cpu_has(X86_FEATURE_ARCH_LBR))
intel_pmu_arch_lbr_init();
