From: AKASHI Takahiro <takahiro.aka...@linaro.org>

Export sdhci-specific UHS-II operations to core.

Signed-off-by: Ben Chuang <ben.chu...@genesyslogic.com.tw>
Signed-off-by: AKASHI Takahiro <takahiro.aka...@linaro.org>
---
 drivers/mmc/host/sdhci.c | 70 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 70 insertions(+)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index c2f6923d296c..aaf41954511a 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -2977,6 +2977,70 @@ static void sdhci_card_event(struct mmc_host *mmc)
        spin_unlock_irqrestore(&host->lock, flags);
 }
 
+#if IS_ENABLED(CONFIG_MMC_SDHCI_UHS2)
+static int sdhci_uhs2_detect_init(struct mmc_host *mmc)
+{
+       struct sdhci_host *host = mmc_priv(mmc);
+       int ret;
+
+       if (sdhci_uhs2_ops.do_detect_init)
+               ret = sdhci_uhs2_ops.do_detect_init(host);
+       else
+               return 0;
+
+       return ret;
+}
+
+static int sdhci_uhs2_set_reg(struct mmc_host *mmc, enum uhs2_act act)
+{
+       struct sdhci_host *host = mmc_priv(mmc);
+       int ret;
+
+       if (sdhci_uhs2_ops.do_set_reg)
+               ret = sdhci_uhs2_ops.do_set_reg(host, act);
+       else
+               ret = 0;
+
+       return ret;
+}
+
+static void sdhci_uhs2_disable_clk(struct mmc_host *mmc)
+{
+       struct sdhci_host *host = mmc_priv(mmc);
+       u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+
+       clk &= ~SDHCI_CLOCK_CARD_EN;
+       sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+}
+
+static void sdhci_uhs2_enable_clk(struct mmc_host *mmc)
+{
+       struct sdhci_host *host = mmc_priv(mmc);
+       u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+       ktime_t timeout;
+
+       clk |= SDHCI_CLOCK_CARD_EN;
+       sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+
+       /* Wait max 20 ms */
+       timeout = ktime_add_ms(ktime_get(), 20);
+       while (1) {
+               bool timedout = ktime_after(ktime_get(), timeout);
+
+               clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+               if (clk & SDHCI_CLOCK_INT_STABLE)
+                       break;
+               if (timedout) {
+                       pr_err("%s: Internal clock never stabilised.\n",
+                              mmc_hostname(host->mmc));
+                       sdhci_dumpregs(host);
+                       return;
+               }
+               udelay(10);
+       }
+}
+#endif /* CONFIG_MMC_SDHCI_UHS2 */
+
 static const struct mmc_host_ops sdhci_ops = {
        .request        = sdhci_request,
        .post_req       = sdhci_post_req,
@@ -2992,6 +3056,12 @@ static const struct mmc_host_ops sdhci_ops = {
        .execute_tuning                 = sdhci_execute_tuning,
        .card_event                     = sdhci_card_event,
        .card_busy      = sdhci_card_busy,
+#if IS_ENABLED(CONFIG_MMC_SDHCI_UHS2)
+       .uhs2_detect_init       = sdhci_uhs2_detect_init,
+       .uhs2_set_reg           = sdhci_uhs2_set_reg,
+       .uhs2_disable_clk       = sdhci_uhs2_disable_clk,
+       .uhs2_enable_clk        = sdhci_uhs2_enable_clk,
+#endif /* CONFIG_MMC_SDHCI_UHS2 */
 };
 
 /*****************************************************************************\
-- 
2.27.0

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