On Fri, Jul 10, 2020 at 20:37 AM Oded Gabbay <oded.gab...@gmail.com> wrote: > Currently the driver halts the device CPU in the halt engines function, > which halts all the engines of the ASIC. The problem is that if later on we > stop the reset process (due to inability to clean memory mappings in time), > the CPU will remain in halt mode. This creates many issues, such as > thermal/power control and FLR handling. > > Therefore, move the halting of the device CPU to the very end of the reset > process, just before writing to the registers to initiate the reset. In > addition, the driver now needs to send a message to the device F/W to > disable it from sending interrupts to the host machine because during halt > engines function the driver disables the MSI/MSI-X interrupts. > > Signed-off-by: Oded Gabbay <oded.gab...@gmail.com>
Reviewed-by: Tomer Tayar <tta...@habana.ai>