On Thu, Jul 02, 2020 at 08:27:14PM +0300, Adrian Pop wrote:
> STM32f769-disco features a 4" MIPI DSI display: add support for it.
> On Cortex-M7 DMA can't use cached memory. For this reason I use a dedicated
> memory pool for DMA with no-cache attribute which is located at the end of
>  RAM.
> 
> Signed-off-by: Adrian Pop <pop.adria...@gmail.com>
> ---
>  arch/arm/boot/dts/stm32f746.dtsi      | 34 +++++++++++++++++++
>  arch/arm/boot/dts/stm32f769-disco.dts | 49 +++++++++++++++++++++++++++
>  2 files changed, 83 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/stm32f746.dtsi 
> b/arch/arm/boot/dts/stm32f746.dtsi
> index 93c063796780..577a812ca01c 100644
> --- a/arch/arm/boot/dts/stm32f746.dtsi
> +++ b/arch/arm/boot/dts/stm32f746.dtsi
> @@ -48,6 +48,19 @@ / {
>       #address-cells = <1>;
>       #size-cells = <1>;
>  
> +     reserved-memory {
> +             #address-cells = <1>;
> +             #size-cells = <1>;
> +             ranges;
> +
> +             linux,dma {

Build your DT with W=1. This will have a warning.

> +                     compatible = "shared-dma-pool";
> +                     linux,dma-default;
> +                     no-map;
> +                     reg = <0xc0f00000 0x100000>;
> +             };
> +     };
> +
>       clocks {
>               clk_hse: clk-hse {
>                       #clock-cells = <0>;
> @@ -75,6 +88,27 @@ clk_i2s_ckin: clk-i2s-ckin {
>       };
>  
>       soc {
> +             ltdc: display-controller@40016800 {
> +                     compatible = "st,stm32-ltdc";
> +                     reg = <0x40016800 0x200>;
> +                     interrupts = <88>, <89>;
> +                     resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
> +                     clocks = <&rcc 1 CLK_LCD>;
> +                     clock-names = "lcd";
> +                     status = "disabled";
> +             };
> +
> +             dsi: dsi@40016c00 {
> +                     compatible = "st,stm32-dsi";
> +                     reg = <0x40016c00 0x800>;
> +                     interrupts = <98>;
> +                     clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>;
> +                     clock-names = "pclk", "ref";
> +                     resets = <&rcc STM32F7_APB2_RESET(DSI)>;
> +                     reset-names = "apb";
> +                     status = "disabled";
> +             };
> +
>               timer2: timer@40000000 {
>                       compatible = "st,stm32-timer";
>                       reg = <0x40000000 0x400>;
> diff --git a/arch/arm/boot/dts/stm32f769-disco.dts 
> b/arch/arm/boot/dts/stm32f769-disco.dts
> index 1626e00bb2cb..a9e81b49809c 100644
> --- a/arch/arm/boot/dts/stm32f769-disco.dts
> +++ b/arch/arm/boot/dts/stm32f769-disco.dts
> @@ -153,3 +153,52 @@ &usbotg_hs {
>       pinctrl-names = "default";
>       status = "okay";
>  };
> +
> +&dsi {
> +     #address-cells = <1>;
> +     #size-cells = <0>;
> +     status = "okay";
> +
> +     ports {
> +             #address-cells = <1>;
> +             #size-cells = <0>;
> +
> +             port@0 {
> +                     reg = <0>;
> +                     dsi_in: endpoint {
> +                             remote-endpoint = <&ltdc_out_dsi>;
> +                     };
> +             };
> +
> +             port@1 {
> +                     reg = <1>;
> +                     dsi_out: endpoint {
> +                             remote-endpoint = <&dsi_in_panel>;
> +                     };
> +             };
> +
> +     };
> +
> +     panel: panel {
> +             compatible = "orisetech,otm8009a";
> +             reg = <0>;
> +             reset-gpios = <&gpioj 15 GPIO_ACTIVE_LOW>;
> +             status = "okay";

Don't need status. Enabled is the default.

> +
> +             port {
> +                     dsi_in_panel: endpoint {
> +                             remote-endpoint = <&dsi_out>;
> +                     };
> +             };
> +     };
> +};
> +
> +&ltdc {
> +     status = "okay";
> +
> +     port {
> +             ltdc_out_dsi: endpoint {
> +                     remote-endpoint = <&dsi_in>;
> +             };
> +     };
> +};
> -- 
> 2.27.0
> 

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