On secure devices there exists a race condition which could lock the MSS
CONFIG AHB bus thus preventing access to BOOT_STATUS register during SSR.
Switch to polling the MSS_STATUS register with an additional 10 us delay
to reliably track boot completion.
Signed-off-by: Sibi Sankar <si...@codeaurora.org>
---
drivers/remoteproc/qcom_q6v5_mss.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
b/drivers/remoteproc/qcom_q6v5_mss.c
index a9ba5f38a58ed..13c6d5a72a831 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -113,8 +113,6 @@
#define QDSP6SS_SLEEP 0x3C
#define QDSP6SS_BOOT_CORE_START 0x400
#define QDSP6SS_BOOT_CMD 0x404
-#define QDSP6SS_BOOT_STATUS 0x408
-#define BOOT_STATUS_TIMEOUT_US 200
#define BOOT_FSM_TIMEOUT 10000
struct reg_info {
@@ -580,13 +578,15 @@ static int q6v5proc_reset(struct q6v5 *qproc)
/* De-assert the Q6 stop core signal */
writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START);
+ /* Wait for 10 us for any staggering logic to settle */
+ usleep_range(10, 20);
+
/* Trigger the boot FSM to start the Q6 out-of-reset sequence */
writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD);
- /* Poll the QDSP6SS_BOOT_STATUS for FSM completion */
- ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_BOOT_STATUS,
- val, (val & BIT(0)) != 0, 1,
- BOOT_STATUS_TIMEOUT_US);
+ /* Poll the MSS_STATUS for FSM completion */
+ ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS,
+ val, (val & BIT(0)) != 0, 10,
BOOT_FSM_TIMEOUT);
if (ret) {
dev_err(qproc->dev, "Boot FSM failed to complete.\n");
/* Reset the modem so that boot FSM is in reset state */
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
