[PATCH 07/13] pinctrl: rockchip: Add RK3368 definitions to separate from other SoCs

[Jianqun Xu]

Add RK3368 definitions to separate from other SoCs.

Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
 drivers/pinctrl/pinctrl-rockchip.c | 34 ++++++++++++++++++------------
 1 file changed, 20 insertions(+), 14 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-rockchip.c 
b/drivers/pinctrl/pinctrl-rockchip.c
index 71335ed003b3..8e3fa9011165 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -1987,6 +1987,9 @@ static void rk3308_calc_drv_reg_and_bit(struct 
rockchip_pin_bank *bank,
 
 #define RK3368_PULL_GRF_OFFSET         0x100
 #define RK3368_PULL_PMU_OFFSET         0x10
+#define RK3368_PULL_BITS_PER_PIN       2
+#define RK3368_PULL_PINS_PER_REG       8
+#define RK3368_PULL_BANK_STRIDE                16
 
 static void rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
                                    int pin_num, struct regmap **regmap,
@@ -1999,25 +2002,28 @@ static void rk3368_calc_pull_reg_and_bit(struct 
rockchip_pin_bank *bank,
                *regmap = info->regmap_pmu;
                *reg = RK3368_PULL_PMU_OFFSET;
 
-               *reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
-               *bit = pin_num % RK3188_PULL_PINS_PER_REG;
-               *bit *= RK3188_PULL_BITS_PER_PIN;
+               *reg += ((pin_num / RK3368_PULL_PINS_PER_REG) * 4);
+               *bit = pin_num % RK3368_PULL_PINS_PER_REG;
+               *bit *= RK3368_PULL_BITS_PER_PIN;
        } else {
                *regmap = info->regmap_base;
                *reg = RK3368_PULL_GRF_OFFSET;
 
                /* correct the offset, as we're starting with the 2nd bank */
                *reg -= 0x10;
-               *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
-               *reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+               *reg += bank->bank_num * RK3368_PULL_BANK_STRIDE;
+               *reg += ((pin_num / RK3368_PULL_PINS_PER_REG) * 4);
 
-               *bit = (pin_num % RK3188_PULL_PINS_PER_REG);
-               *bit *= RK3188_PULL_BITS_PER_PIN;
+               *bit = (pin_num % RK3368_PULL_PINS_PER_REG);
+               *bit *= RK3368_PULL_BITS_PER_PIN;
        }
 }
 
 #define RK3368_DRV_PMU_OFFSET          0x20
 #define RK3368_DRV_GRF_OFFSET          0x200
+#define RK3368_DRV_BITS_PER_PIN                2
+#define RK3368_DRV_PINS_PER_REG                8
+#define RK3368_DRV_BANK_STRIDE         16
 
 static void rk3368_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
                                    int pin_num, struct regmap **regmap,
@@ -2030,20 +2036,20 @@ static void rk3368_calc_drv_reg_and_bit(struct 
rockchip_pin_bank *bank,
                *regmap = info->regmap_pmu;
                *reg = RK3368_DRV_PMU_OFFSET;
 
-               *reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4);
-               *bit = pin_num % RK3288_DRV_PINS_PER_REG;
-               *bit *= RK3288_DRV_BITS_PER_PIN;
+               *reg += ((pin_num / RK3368_DRV_PINS_PER_REG) * 4);
+               *bit = pin_num % RK3368_DRV_PINS_PER_REG;
+               *bit *= RK3368_DRV_BITS_PER_PIN;
        } else {
                *regmap = info->regmap_base;
                *reg = RK3368_DRV_GRF_OFFSET;
 
                /* correct the offset, as we're starting with the 2nd bank */
                *reg -= 0x10;
-               *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE;
-               *reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4);
+               *reg += bank->bank_num * RK3368_DRV_BANK_STRIDE;
+               *reg += ((pin_num / RK3368_DRV_PINS_PER_REG) * 4);
 
-               *bit = (pin_num % RK3288_DRV_PINS_PER_REG);
-               *bit *= RK3288_DRV_BITS_PER_PIN;
+               *bit = (pin_num % RK3368_DRV_PINS_PER_REG);
+               *bit *= RK3368_DRV_BITS_PER_PIN;
        }
 }
 
-- 
2.17.1