On 7/22/20 5:36 PM, Mika Westerberg wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > content is safe > > Hi, > > On Wed, Jul 22, 2020 at 02:28:30PM +0000, tudor.amba...@microchip.com wrote: >> + Mika >> >> Hi, Mika, >> >> Would you please review the patch from below? > > Sure, there is minor comment below. > >> >> Thanks! >> >> On 7/22/20 5:01 PM, Alexander Sverdlin wrote: >>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the >>> content is safe >>> >>> From: Alexander Sverdlin <alexander.sverd...@nokia.com> >>> >>> After spi_nor_write_disable() return code checks were introduced in the >>> spi-nor front end intel-spi backend stopped to work because WRDI was never >>> supported and always failed. >>> >>> Just pretend it was sucessful and ignore the command itself. HW sequencer >>> shall do the right thing automatically, while with SW sequencer we cannot >>> do it anyway, because the only tool we had was preopcode and it makes no >>> sense for WRDI. >>> >>> Cc: sta...@vger.kernel.org >>> Fixes: bce679e5ae3a ("mtd: spi-nor: Check for errors after each Register >>> Operation") >>> Signed-off-by: Alexander Sverdlin <alexander.sverd...@nokia.com> >>> --- >>> drivers/mtd/spi-nor/controllers/intel-spi.c | 8 ++++++++ >>> 1 file changed, 8 insertions(+) >>> >>> diff --git a/drivers/mtd/spi-nor/controllers/intel-spi.c >>> b/drivers/mtd/spi-nor/controllers/intel-spi.c >>> index 61d2a0a..134b356 100644 >>> --- a/drivers/mtd/spi-nor/controllers/intel-spi.c >>> +++ b/drivers/mtd/spi-nor/controllers/intel-spi.c >>> @@ -612,6 +612,14 @@ static int intel_spi_write_reg(struct spi_nor *nor, u8 >>> opcode, const u8 *buf, >>> return 0; >>> } >>> >>> + /* >>> + * We hope that HW sequencer will do the right thing automatically >>> and >>> + * with the SW seuencer we cannot use preopcode any way, so just >>> ignore > ^^^^^^^^ > Typo, should be sequencer. > > Otherwise looks good to me. >
It looks good to me too. Should I add your R-b tag when applying? I can fix the typo. Cheers, ta