This patch enables AMD Fam17h RAPL support for the power capping
framework. The support is as per AMD Fam17h Model31h (Zen2) and
model 00-ffh (Zen1) PPR.

Tested by comparing the results of following two sysfs entries and the
values directly read from corresponding MSRs via /dev/cpu/[x]/msr:
  /sys/class/powercap/intel-rapl/intel-rapl:0/energy_uj
  /sys/class/powercap/intel-rapl/intel-rapl:0/intel-rapl:0:0/energy_uj

Signed-off-by: Victor Ding <[email protected]>
---

 arch/x86/include/asm/msr-index.h     |  1 +
 drivers/powercap/intel_rapl_common.c |  2 ++
 drivers/powercap/intel_rapl_msr.c    | 27 ++++++++++++++++++++++++++-
 3 files changed, 29 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index c5e92317356e..533208998297 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -306,6 +306,7 @@
 #define MSR_PP1_POLICY                 0x00000642
 
 #define MSR_AMD_RAPL_POWER_UNIT                0xc0010299
+#define MSR_AMD_CORE_ENERGY_STATUS     0xc001029a
 #define MSR_AMD_PKG_ENERGY_STATUS      0xc001029b
 
 /* Config TDP MSRs */
diff --git a/drivers/powercap/intel_rapl_common.c 
b/drivers/powercap/intel_rapl_common.c
index 61a63a16b5e7..8ca4413ef2de 100644
--- a/drivers/powercap/intel_rapl_common.c
+++ b/drivers/powercap/intel_rapl_common.c
@@ -992,6 +992,8 @@ static const struct x86_cpu_id rapl_ids[] __initconst = {
 
        X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL,        
&rapl_defaults_hsw_server),
        X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM,        
&rapl_defaults_hsw_server),
+
+       X86_MATCH_VENDOR_FAM(AMD, 0x17, &rapl_defaults_core),
        {}
 };
 MODULE_DEVICE_TABLE(x86cpu, rapl_ids);
diff --git a/drivers/powercap/intel_rapl_msr.c 
b/drivers/powercap/intel_rapl_msr.c
index 430b4819d6ab..31d10a169e41 100644
--- a/drivers/powercap/intel_rapl_msr.c
+++ b/drivers/powercap/intel_rapl_msr.c
@@ -47,6 +47,21 @@ static struct rapl_if_priv rapl_msr_priv_intel = {
        .limits[RAPL_DOMAIN_PACKAGE] = 2,
 };
 
+static struct rapl_if_priv rapl_msr_priv_amd = {
+       .reg_unit = MSR_AMD_RAPL_POWER_UNIT,
+       .regs[RAPL_DOMAIN_PACKAGE] = {
+               0, MSR_AMD_PKG_ENERGY_STATUS, 0, 0, 0 },
+       .regs[RAPL_DOMAIN_PP0] = {
+               0, MSR_AMD_CORE_ENERGY_STATUS, 0, 0, 0 },
+       .regs[RAPL_DOMAIN_PP1] = {
+               0, 0, 0, 0, 0 },
+       .regs[RAPL_DOMAIN_DRAM] = {
+               0, 0, 0, 0, 0 },
+       .regs[RAPL_DOMAIN_PLATFORM] = {
+               0, 0, 0, 0, 0},
+       .limits[RAPL_DOMAIN_PACKAGE] = 1,
+};
+
 /* Handles CPU hotplug on multi-socket systems.
  * If a CPU goes online as the first CPU of the physical package
  * we add the RAPL package to the system. Similarly, when the last
@@ -129,7 +144,17 @@ static int rapl_msr_probe(struct platform_device *pdev)
 {
        int ret;
 
-       rapl_msr_priv = &rapl_msr_priv_intel;
+       switch (boot_cpu_data.x86_vendor) {
+       case X86_VENDOR_INTEL:
+               rapl_msr_priv = &rapl_msr_priv_intel;
+               break;
+       case X86_VENDOR_AMD:
+               rapl_msr_priv = &rapl_msr_priv_amd;
+               break;
+       default:
+               pr_err("intel-rapl does not support CPU vendor %d\n", 
boot_cpu_data.x86_vendor);
+               return -ENODEV;
+       }
        rapl_msr_priv->read_raw = rapl_msr_read_raw;
        rapl_msr_priv->write_raw = rapl_msr_write_raw;
 
-- 
2.28.0.rc0.142.g3c755180ce-goog

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