On Tue, Jul 28, 2020 at 4:38 PM Babu Moger <babu.mo...@amd.com> wrote:
>
> Modify intercept_exceptions to generic intercepts in vmcb_control_area.
> Use the generic __set_intercept, __clr_intercept and __is_intercept to
> set the intercept_exceptions bits.
>
> Signed-off-by: Babu Moger <babu.mo...@amd.com>
> ---
> @@ -52,6 +54,25 @@ enum {
> INTERCEPT_DR5_WRITE,
> INTERCEPT_DR6_WRITE,
> INTERCEPT_DR7_WRITE,
> + /* Byte offset 008h (Vector 2) */
> + INTERCEPT_DE_VECTOR = 64 + DE_VECTOR,
> + INTERCEPT_DB_VECTOR,
> + INTERCEPT_BP_VECTOR = 64 + BP_VECTOR,
> + INTERCEPT_OF_VECTOR,
> + INTERCEPT_BR_VECTOR,
> + INTERCEPT_UD_VECTOR,
> + INTERCEPT_NM_VECTOR,
> + INTERCEPT_DF_VECTOR,
> + INTERCEPT_TS_VECTOR = 64 + TS_VECTOR,
> + INTERCEPT_NP_VECTOR,
> + INTERCEPT_SS_VECTOR,
> + INTERCEPT_GP_VECTOR,
> + INTERCEPT_PF_VECTOR,
> + INTERCEPT_MF_VECTOR = 64 + MF_VECTOR,
> + INTERCEPT_AC_VECTOR,
> + INTERCEPT_MC_VECTOR,
> + INTERCEPT_XM_VECTOR,
> + INTERCEPT_VE_VECTOR,
> };
I think it's demanding a lot of the reader to know where there are and
are not gaps in the allocated hardware exception vectors. Perhaps all
of the above enumeration definitions could have initializers? Either
way...
Reviewed-by: Jim Mattson <jmatt...@google.com>
