Add support for the SMBus-Alert protocol.

Signed-off-by: Alain Volmat <alain.vol...@st.com>
---
 This patch has to be integrated on top of the patch
 'i2c: stm32f7: Add SMBus Host-Notify protocol support' since SMBus Alert is
 enabled by the DT binding 'smbus' introduced in that patch.

 drivers/i2c/busses/i2c-stm32f7.c | 71 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 71 insertions(+)

diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c
index 223c238c3c09..fe7641da54ef 100644
--- a/drivers/i2c/busses/i2c-stm32f7.c
+++ b/drivers/i2c/busses/i2c-stm32f7.c
@@ -51,6 +51,7 @@
 
 /* STM32F7 I2C control 1 */
 #define STM32F7_I2C_CR1_PECEN                  BIT(23)
+#define STM32F7_I2C_CR1_ALERTEN                        BIT(22)
 #define STM32F7_I2C_CR1_SMBHEN                 BIT(20)
 #define STM32F7_I2C_CR1_WUPEN                  BIT(18)
 #define STM32F7_I2C_CR1_SBC                    BIT(16)
@@ -123,6 +124,7 @@
                                (((n) & STM32F7_I2C_ISR_ADDCODE_MASK) >> 17)
 #define STM32F7_I2C_ISR_DIR                    BIT(16)
 #define STM32F7_I2C_ISR_BUSY                   BIT(15)
+#define STM32F7_I2C_ISR_ALERT                  BIT(13)
 #define STM32F7_I2C_ISR_PECERR                 BIT(11)
 #define STM32F7_I2C_ISR_ARLO                   BIT(9)
 #define STM32F7_I2C_ISR_BERR                   BIT(8)
@@ -136,6 +138,7 @@
 #define STM32F7_I2C_ISR_TXE                    BIT(0)
 
 /* STM32F7 I2C Interrupt Clear */
+#define STM32F7_I2C_ICR_ALERTCF                        BIT(13)
 #define STM32F7_I2C_ICR_PECCF                  BIT(11)
 #define STM32F7_I2C_ICR_ARLOCF                 BIT(9)
 #define STM32F7_I2C_ICR_BERRCF                 BIT(8)
@@ -277,6 +280,17 @@ struct stm32f7_i2c_msg {
 };
 
 /**
+ * struct stm32f7_i2c_alert - SMBus alert specific data
+ * @setup: platform data for the smbus_alert i2c client
+ * @ara: I2C slave device used to respond to the SMBus Alert with Alert
+ * Response Address
+ */
+struct stm32f7_i2c_alert {
+       struct i2c_smbus_alert_setup setup;
+       struct i2c_client *ara;
+};
+
+/**
  * struct stm32f7_i2c_dev - private data of the controller
  * @adap: I2C adapter for this controller
  * @dev: device for this controller
@@ -305,6 +319,7 @@ struct stm32f7_i2c_msg {
  * @wakeup_src: boolean to know if the device is a wakeup source
  * @smbus_mode: states that the controller is configured in SMBus mode
  * @host_notify_client: SMBus host-notify client
+ * @alert: SMBus alert specific data
  */
 struct stm32f7_i2c_dev {
        struct i2c_adapter adap;
@@ -333,6 +348,7 @@ struct stm32f7_i2c_dev {
        bool wakeup_src;
        bool smbus_mode;
        struct i2c_client *host_notify_client;
+       struct stm32f7_i2c_alert *alert;
 };
 
 /*
@@ -1601,6 +1617,13 @@ static irqreturn_t stm32f7_i2c_isr_error(int irq, void 
*data)
                f7_msg->result = -EINVAL;
        }
 
+       if (status & STM32F7_I2C_ISR_ALERT) {
+               dev_dbg(dev, "<%s>: SMBus alert received\n", __func__);
+               writel_relaxed(STM32F7_I2C_ICR_ALERTCF, base + STM32F7_I2C_ICR);
+               i2c_handle_smbus_alert(i2c_dev->alert->ara);
+               return IRQ_HANDLED;
+       }
+
        if (!i2c_dev->slave_running) {
                u32 mask;
                /* Disable interrupts */
@@ -1967,6 +1990,42 @@ static void stm32f7_i2c_disable_smbus_host(struct 
stm32f7_i2c_dev *i2c_dev)
        }
 }
 
+static int stm32f7_i2c_enable_smbus_alert(struct stm32f7_i2c_dev *i2c_dev)
+{
+       struct stm32f7_i2c_alert *alert;
+       struct i2c_adapter *adap = &i2c_dev->adap;
+       struct device *dev = i2c_dev->dev;
+       void __iomem *base = i2c_dev->base;
+
+       alert = devm_kzalloc(dev, sizeof(*alert), GFP_KERNEL);
+       if (!alert)
+               return -ENOMEM;
+
+       alert->ara = i2c_new_smbus_alert_device(adap, &alert->setup);
+       if (IS_ERR(alert->ara))
+               return PTR_ERR(alert->ara);
+
+       i2c_dev->alert = alert;
+
+       /* Enable SMBus Alert */
+       stm32f7_i2c_set_bits(base + STM32F7_I2C_CR1, STM32F7_I2C_CR1_ALERTEN);
+
+       return 0;
+}
+
+static void stm32f7_i2c_disable_smbus_alert(struct stm32f7_i2c_dev *i2c_dev)
+{
+       struct stm32f7_i2c_alert *alert = i2c_dev->alert;
+       void __iomem *base = i2c_dev->base;
+
+       if (alert) {
+               /* Disable SMBus Alert */
+               stm32f7_i2c_clr_bits(base + STM32F7_I2C_CR1,
+                                    STM32F7_I2C_CR1_ALERTEN);
+               i2c_unregister_device(alert->ara);
+       }
+}
+
 static u32 stm32f7_i2c_func(struct i2c_adapter *adap)
 {
        struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
@@ -2161,6 +2220,14 @@ static int stm32f7_i2c_probe(struct platform_device 
*pdev)
                                ret);
                        goto i2c_adapter_remove;
                }
+
+               ret = stm32f7_i2c_enable_smbus_alert(i2c_dev);
+               if (ret) {
+                       dev_err(i2c_dev->dev,
+                               "failed to enable SMBus alert protocol (%d)\n",
+                               ret);
+                       goto i2c_disable_smbus_host;
+               }
        }
 
        dev_info(i2c_dev->dev, "STM32F7 I2C-%d bus adapter\n", adap->nr);
@@ -2170,6 +2237,9 @@ static int stm32f7_i2c_probe(struct platform_device *pdev)
 
        return 0;
 
+i2c_disable_smbus_host:
+       stm32f7_i2c_disable_smbus_host(i2c_dev);
+
 i2c_adapter_remove:
        i2c_del_adapter(adap);
 
@@ -2204,6 +2274,7 @@ static int stm32f7_i2c_remove(struct platform_device 
*pdev)
 {
        struct stm32f7_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
 
+       stm32f7_i2c_disable_smbus_alert(i2c_dev);
        stm32f7_i2c_disable_smbus_host(i2c_dev);
 
        i2c_del_adapter(&i2c_dev->adap);
-- 
2.7.4

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